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7 Posts tagged with the cpu tag
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CortexA9.jpg

ARM Cortex A-9 (via TSMC)

 

Today's processor industry is largely controlled by two companies, Intel and ARM Holdings. Intel produces processors running in most of today’s laptops, desktops, and servers. On the other hand, ARM largely dominates the quickly growing mobile industry. Both are looking to invade each others markets soon by developing processors with high performance and low power consumption, or a strong performance per watt ratio.

 

 

Taiwan Semiconductor Manufacturing Company (TSMC) may have just made ARM Holdings future in the CPU market a bit more promising. At TSMC, they have recently ran a 28nm dual-core ARM Cortex A-9 processor at a max speed of 3.1GHz. The clock speed is 55% higher than present and is about twice as fast as its 40nm counterpart at TSMC. Additionally, the ARM chips also have the advantage of very little heat dissipation, giving them the ability to be densely packed together with one another.

 

 

Two of ARM's many partners include Nvidia and Calxeda, are both looking to produce ARM based processors to compete with Intel. Calxeda is working on producing chips for servers that work more efficiently. Such as implementing overlapping operations during each clock cycle to allow better speed handling. The method gives them an efficiency boost and may work to an advantage for large data retrieving applications such as web hosting.

 

 

TSMC also produces mobile chips for Nvidia. The successful high speed processing test can also mean good things for Nvidia. Nvidia is working on a custom ARM based processor to use in desktops and laptops to compete with Intel. The CPU project dubbed Project Denver has already been in development for some time, but TSMC's latest breakthrough could give the project a large boost.

 

 

The coming products produced from this “competition” should give us some interesting products in the future. Both companies will not easily be letting other companies invade their markets. The server market is worth $50 billion due to the rise of cloud computing and use of social networking. In addition, everyone can see the rise in the uses of tablets and smart phones.  The competition will lead us into the future of processor technology, which will be developed with these two companies paving the way.

 

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Rosepoint chip (via Intel)

 

‘Fused’ chips are fast becoming the status quo in powering today’s mobile devices, particularly tablets and smartphones. For those of you who don’t know what fused chips are, they combine CPU’s and  For those of you who don’t know what fused chips are, they combine CPU’s and GPU’s on a single chip (or die) such as AMD’s Fusion. Intel has recently stepped up their game in this field with the introduction of their Sandy Bridge line of fused chips, but they have not stopped the integration there.

 

 

The company has recently stated that they have combined Wi-Fi with their line of Atom processors code named Rosepoint which will be unveiled at this year’s International Solid-State Circuits Conference in San Francisco. Not much is known about Rosepoint but a few ‘leaked’ images and a vague Intel press release. Details say that it features a 32nm SoC with a built-in Wi-Fi transceiver (running at a reported 2.4 GHz or 4G) with two Atom CPU’s all crammed onto the same die. Another goal is to reduce the chip-count. Although a wireless transmitter that close to other digital signals would cause interference, Intel has found some "hush-hush" way to shield the CPU from the WiFi onboard. The integration of wireless onto CPU cores means less power usage as well as costs. If all goes well, the technology could be found in mobile devices as early as 2013.

 

 

More information will be released at this year’s ISSCC so check back for an update! (ISSCC runs from February 19-23rd.)

 

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Engineering On Friday CPU GPU a Toast to Us by Cabe Atwell b.jpg

If your reading this, chances are your using a laptop or PC to do so. Being that this article is on an engineering oriented website you most likely have some knowledge as to what components are housed in either one of them. I'm talking primarily about the CPU (Central Processing Unit) and the GPU (Graphical Processing Unit) that make up the computer's brain and muscle respectively.

 

The CPU processes complex code or software and executes the instructions based on what app/software is being used. However, it has a tough time when it comes to executing code that uses high-intensive 3D images or graphics. That is where the GPU comes in. It offloads most of the work needed for images from the host CPU and allows it to crunch 1's and 0's for other tasks. Companies like AMD and NVIDIA have even combined the two on a single die (or chip).  While they work in tandem with software, they do not really communicate with each other. Sad, I know.

 

All is not lost, as engineers from North Carolina State University have found a way to overcome that problem and even give the hybrid processor a 20% increase in performance. Dr. Huiyang Zhou, an associate professor of electrical and computer engineering, and his team accomplished this by having the GPU portion of the chip handle the computations while the CPU 'fetches' the data the GPU needs from system memory. Both grab data from system memory at relatively the same speed. However, the GPU can crunch the numbers faster when it comes to graphics, but the CPU is quicker when it comes to what information the GPU will need to accomplish its task. That makes the whole process more efficient according to Dr. Zhou. In recent tests, the team found that 'fused' chips increased their performance by 21.4%, which is no small feat, as any overclocker will tell you. Some tasks even rocketed over 114% faster.

 

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(Left) AMD Fusion APU (Right) Partial Roadmap (via AMD)

 

The research was partly funded by AMD, and the experiment was simulated on a future Accelerated Processing Unit (APU) where there is a shared L3 cache. The technique may be publicly available rather soon.

 

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See more Engineering On Friday comics in the Engineering Life group.

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graphics6.jpg

Imagination press image

 

Imagination dazels people when it is applied to technology (this is why there is a CES). A company of the same name, Imagination, has amazed many with their new PoweVR line of GPU’s. Currently, mobile devices' raw graphics power being dominated by giants such as AMD, Intel and NVIDIA. However, they may have to shave of a percent or two of dominance with Imagination’s G6200 and G6400 GPU IP cores. The company says that these cores are scalable for both the mobile market as well as high-end gaming machines. What sets these GPU’s apart from the others is use of what’s called ‘Compute Clusters’.


These are a cluster of programmable arrays that spread the ‘work load’ giving them efficiency in both power and bandwidth. Think of it like a LAN party on a chip, or like Stanford University’s Folding At Home project, where a ton of computers work on one project without any one PC handling the entire load. Imagination’s G6200 is equipped with two clusters while the G6400 takes advantage of four giving those 100GFLOPS and in some cases in the TFLOP range! All the series 6 in Imagination’s PowerVR line feature OpenGL 3.x/4.x, OpenCL and DirectX 10 (in some versions DirectX 11.1 is implemented). Imagination states that these new chips are 20 times more powerful than the current generation out today while being 5 times more efficient.


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In a discussion last evening, a friend and I were debating over what is true A.I. I stated the simplistic autonomous robots used today is the best accomplished. We both agreed that with the limited number of rules these robots follow, it is more like an algorithm they are following. Our conclusion is modeling the human mind, the most complex machine known to man. On the heels of the talk, I decided to look into specifications of a brain.

 

The brain transfers data at 10 hertz. The 4+ gigahertz processors seen today can not approach the processing power of the brain, why? Parallel processing and data volume transfer speeds. With 100 billion neurons (the processors), 100 trillion synapses (memory), and axons in every neuron (data patheways). Why not just model the brain? With advancements in nanotechnology, supercomputing, and neuroscience this is a possibility.

 

Columbia University’s Stefano Fusi describes the brain vs. the computer.

 

IBM will attempt to do just that. In a departure from the von Neumann computer architecture, that  transfers data on a bus between a single processor and memory storage, to a brain like parallel handling of data called SyNAPSE (Systems of Neuromorphic Adaptive Plastic Scalable Electronics).

 

IBM researchers John Arthur and Paul Merolla describe the inspiration for the project.


IBM's first SyNAPSE based system will be a scaled down mini-brain.

● 256 neurons

● An array of 256 x 256 (65,536) synapses

● 256 axons

 

This "core" will be constructed with only a few million transistors, much less than the billions found in many CPUs today.

 

The final step for IBM is to combine these cores into a 100 billion neuron, 100 trillion synapse system rivaling human brain power. It will be have a volume of 2-litres and consume about 1 kW. IBM's Blue Gene super computer has 147,456 processors, 144 terabytes of memory, and is in large air conditioned cabinet consuming 2 megawatts of power.

 

Steven Esser of IBM research describes the software


The SyNAPSE comes from a $21 million dollar grant from DARPA. Six IBM labs and four universities (Cornell, the University of Wisconsin, University of California at Merced, and Columbia) along with some government researchers.

 

Will this lead to true, real time, human like artificial intelligence? IBM thinks so. They are already "waving the banner" of its use in monitoring for natural disasters and sending out warnings. Saving people's lives in the cornerstone for research grants these days.

 

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I'm fairly new to the security sector, so I've been brushing up on my security factoids.  In this post, I talk about some of the most interesting chip-level security systems that I've found.  I'd love to hear about any neat security measures that you've dealt with!

 

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Image Courtesty of the US Army


There’s no doubt that we are living in troubled times.  Every day, there seems to be another news report explaining the most recent security breach, newest terrorist threat, or next major international crisis.  At the heart of many of these problems lies security.  “Security” is a pretty broad term, and can refer to a lot of different issues and circumstances.  For now, let’s focus on access and system-level security.  This refers to the steps that are taken to ensure that only people with the proper credentials are given access to specific data or resources.  When access security is breached, it means that an unauthorized person has gained access to data or resources that they should not have.  This might then be traded, sold, or otherwise utilized to incite criminal activities or other forms of malfeasance. In the ideal scenario, we want to prevent these security breaches on the physical and technological levels.

 

My recent element14 video tutorial explaining RFID tag reading got me thinking about how we secure our electronics and our data.  There are obviously physical security layers such as guards, locked doors, and biometric scanners, but the more commonly attacked layer of security is the kind that occurs at the system level.  System security measures can range from good coding practices to microchips that are capable of destroying themselves when they detect unauthorized access.

 

Let’s start by looking at my favorite form of electronic security: self-destruction.  Some integrated circuits feature a self-destruct mechanism that will fry the chip and any sensitive memory when it detects tampering.  The MAXQ1740 (an IC for reading magnetic cards), for example, will destroy itself when it detects attempted hardware tampering.  Thankfully, that is a last ditch scenario – it also utilizes AES encryption and scrambling to occlude sensitive data like credit card numbers from being accessed by an unauthorized party.

Importantly, hackers don’t necessarily always simply want access to EEPROM non-volatile memory where things like password hashes might be stored.  A common hardware attack involves finding a way to dump the program firmware from a microcontroller.  Once that’s been done, it can be manipulated to run additional routines, access secure memory, or to report sensitive data back to a hacker.  Sometimes, competitors will want to steal firmware source code to identify proprietary algorithms used in another manufacturer’s CPU.  Physical die coating, bus scrambling, and encryption keys are generally used to prevent physical probing and analysis of a chip.

 

Various additional forms of security are often applied at the software, system, and network levels.  At the system level, some form of encryption is generally employed, where only the end-nodes of a communication system hold a key to unscramble transmitted data.  Since the data is transmitted in a scrambled state and requires a key to decode, it isn’t possible to eavesdrop on anything useful.  A hacker can attempt to acquire the secret key, but that would require gaining access to the firmware as described previously.

 

Network security can be particularly daunting, because it’s difficult to identify the “weakest link” that could lead to a breach.  For this reason, organizations often employ the “honey pot” approach, where an intentionally crippled system is left partially exposed to lure in hackers.  System administrators can then often trace individuals trying to break into the dummy system.

 

How does this all come back to Electrical Engineering?  While software security is critical to building safe systems, security always eventually comes back to the chips themselves.  If the hardware running the system includes bugs that could allow data to be read off directly, then all software defenses become useless.  There’s an interesting balance between creating well-crafted hardware, and secure hardware.  It’s often necessary to obfuscate integrated circuit design in order to improve physical chip security.  The balance should be chosen based on the scope of the project; it is important to ensure that the design remains understandable to potential new developers, while effectively stumping potential system hackers.  What are your thoughts on system security?  Do you stick to good coding practices, or do you implement protection in your hardware as well?  How much security is too much, and in what scenarios can you ignore it all together?

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Brute force almost always beats elegance when it comes to processor power. Increase the clock speed, super-cool the cpu, add more cores, and the like have been the major processing power increase techniques for some time. However, researchers from the North Carolina State University are taking the elegance route on multicore CPUs. Their focus is on prefetching data. Processors predict what data may be needed next, and load it into its cache. In some cases, it may load the wrong data and slow down performance as it seeks the correct set of data. In other words, prefetching could hinder performance. Dr. Tan Solihin, associate professor of electrical and computer engineering, has a solution, better prediction and the ability to turn off prefetching when it may actually be cumbersome.

 

He explains, "The first technique relies on criteria we developed to determine how much bandwidth should be allotted to each core on a chip. By better distributing the bandwidth to the appropriate cores, the criteria are able to maximize system performance. The second technique relies on a set of criteria we developed for determining when prefetching will boost performance and should be utilized, as well as when prefetching would slow things down and should be avoided."

 

The results were shown to increase performance by 40% on processors without prefetching, as expected, and 10% in the processors that utilize prefetching at all times. Read more about his system in the paper, "Studying the Impact of Hardware Prefetching and Bandwidth Partitioning in Chip-Multiprocessors."

 

Eavesdropper