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FPGA Design Guidebook - Altera FPGA and CPLD selection table

VERSION 3  Click to view document history
Created on: Jul 3, 2009 11:36 AM by tech6 - Last Modified:  Dec 19, 2011 6:07 PM by tech6

Contents  |  Part 1  |  Part 2  |  Part 3  |  Part 4  |  Part 5  |  Part 6  |  Part 7  |  Part 8   |

 

Altera FPGA and CPLD selection table

 

Device TypeHigh-End FPGA
Device FamilyStratix IV E (Enhanced)Stratix IV GX transceiverStratix III L family   provides balanced logic, memory, and multiplier ratios for mainstream   applicationsStratix III E family   is memory and multiplier rich for data-centric applications.Stratix IIStratix II GX
Mfr P/NEP4SE110EP4SE230EP4SE290EP4SE360EP4SE530EP4SE680EP4SGX70EP4SGX110EP4SGX230EP4SGX290EP4SGX360EP4SGX530EP3SL50EP3SL70EP3SL110EP3SL150EP3SL200EP3SL340EP3SE50EP3SE80EP3SE110EP3SE260EP2S15EP2S30EP2S60EP2S90EP2S130EP2S180EP2SGX30CEP2SGX30DEP2SGX60CEP2SGX60DEP2SGX60EEP2SGX90EEP2SGX90FEP2SGX130/G
FOC----1637245--15494861549487   154948916372371637239--163723416372421549490154949115494931637243--1637244 1637240
NOC----11P0457--94M724394M7244   94M7245 94M724611P045411P045613M082911P045111P044694M724094M724194M724211P0447--11P044811P0445
Process40-nm1.1-V, 65-nm all-layer copper SRAM1.2-V, 90-nm,   all-layer copper SRAM
FeatureEquivalent Les10560022800029120035360053120068110072600105,600228,000291,200353,600531,20047,50067,500106,50042,000198,900338,00047,50080,000106,500254,40015,60033,88060,44090,960132,540179,40033,88060,44090,960132,540
ALMs4224091200116480141440021248027244029,04042,24091,200116,480141,440212,48019,00027,00042,60056,80079,560135,20019,00032,00042,600101,7606,24013,55224,17636,38453,01671,76013,55224,17636,38453,016
Registers8448018240023296028288042496054488058,08084,480182,400232,960282,880424,96038,00054,00085,200113,600159,120270,40038,00064,00085,200203,520--
M9K   blocks66012359361248128015294626601,2359361,2481,2801081502753554681040400495639864--
M144K   blocks16223648641622364864612162448121648--
MLAB(Kbits)1320285036404420664085149081,3202,8503,6404,4206,6405948441344178125004219594100013443188--
Embedded   RAM (Mbits)8.113.913.317.720.322.46.38.113.913.317.720.31,8362,2144,2035,4997,66816,2725,3286,1838,05514,688--
ALUTs--12,48027,10448,35272,768106,032143,52027,10448,35272,768106,032
M512 RAM   blocks--104202329488699930202329488699
M4K RAM   blocks--78144255408609768144255408609
MRAM   blocks--0124691246
Total RAM   (Kbits)956417133172482256427376314917,3709,56417,13317,24822,56427,3762,4303,0585,5477,28011,89620,4915,9227,1839,39917,876419,3281,369,7282,544,1924,520,4886,747,8409,383,0401,369,7282,544,1924,520,4486,747,840
PLLs44/8/128/12/1233/43/6/84/6/8/126/8/124812481261248
Maximum   user I/O pins48086496011043687368649044887449761,12074497636650071890211261170361364534558650734
Speed   grades-2,-3,-4-3,-4-2,-3,-4-3,-4-2,-3,-4-3, -4, -5
DSP   blocks64161104130128170486416110413012827363648727248841129612163648639616364864
I/O   registers per I/O element----6
HardCopy   IIYYNY--
Design   securityYYY
Embedded   processorNios II processorNios II processorNios II processor
18x18/9 x   9 embedded multipliers512/--1,288/--832/--1,040/--1,024/--1,360/--384/--512/--1,288/--832/--1040/--1024/--216/--288/--384/--576/--384/--672/--896/--768/--48/9664/128144/288192/384252/504384/76864/128144/288252/504
True   dual-port RAMYYY
Global  clock networks16161648
Regional   clock networks88648848884888--
Periphery   clock networks56881125688112104208104208--
Configuration   file size (Mbits)52102140189230521021401892247661202648935101728405310172840
I/O featuresI/O   voltage1.2, 1.5, 1.8, 2.5, 3.31.2, 1.5, 1.8, 2.5, 3.01.5, 1.8, 2.5, 3.3
I/O   standardsLVTTL, LVCMOS, PCI,   PCI-X, LVDS, mini-LVDS, RSDS, LVPECL, Differential SSTL-15,Differential   SSTL-18, Differential SSTL-2, Differential HSTL-12,Differential HSTL-15,   Differential HSTL-18, SSTL-15 (I and II), SSTL-18 (I and II),SSTL-2 (I and   II), 1.2V HSTL (I and II), 1.5V HSTL (I and II), 1.8V HSTL (I and II)LVDS, LVPECL, Differential SSTL-18, Differential   SSTL-2, Differential HSTL,SSTL-18 (I and II), SSTL-15 (I and II), SSTL-2 (I   and II), 1.5V HSTL (I and II),1.8V HSTL (I and II), PCI, PCI-X 1.0, LVTTL,   LVCMOSLVDS, LVPECL,   HyperTransport, Differential SSTL-18,Differential SSTL-2, Differential HSTL,   SSTL-18 (I and II),SSTL-2 (I and II),1.5V HSTL (I and II), 1.8V HSTL (I and   II),PCI, PCI-X 1.0, LVTTL, LVCMOS
SPI-4.2   Links333/4/43/44/64/6/7111/2/40/2/4/40/2/42/4----
LVDS max   data rate (Mbps)150Mbps-1.6Gbps125–1,250125–1,000
LVDS   channels56/5688/88112/11228/2828/28,44/44,88/880/0,44/44,88/880/0,44/44,88/8844/44,88/88,98/9856/5688/88112/112132/13256/5688/88112/11238/3858/5880/84114/118152/156152/15631/2942/4247/4559/5973/71
Embedded   DPA circuitryYYY
SERDES   data rate range--600 Mbps–8.5 Gbps----600 Mbps–6.375 Gbps
SERDES   channels--88/168/16/2416/2416/2416/24/32----484812121620
Series   OCTYYY
Programmable   drive strengthYYY
External
memory
interfaces
Memory devicesDDR3, DDR2, DDR, QDR II, RLDRAM II SDRDDR3, DDR2, DDR, QDR II, RLDRAM II, SDRDDR2, DDR, QDR II,   RLDRAM II, SDR

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