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Dear Microcontroller and Microprocessor users

 

1. You are looking for some training to learn programming your RiOTboard (i.MX6 ARM Cortex-A9) or your Freedom board (Kinetis ARM Cortex-M0+/M4) ?

2. You are able to come to Paris, France to visit us at the Freescale DWF event scheduled October 14th 2014 in the famous Roland Garros tennis stadium ?


Farnell/Element14 will drive a technical hands-on for RiOT board and teach you step-by-step, how to create a webserver demo featuring a temperature sensor datalogger, which a nice IoT example.

During this 3h lab, you will learn how to copy a BSP image, generate a Linux BSP image with the Yocto builder tool and you will start creating the application based on Linux 3.10.

Computer and boards will be provided during the workshop session.


Freescale will drive a hands-on for Freedom board (FRDM-K64F) and teach you step-by-step how to create a sensing application which is another nice IoT peripheral example.

During this 3h lab, you will learn how to create from scratch a project using new Freescale development tools Kinetis Design Studio (IDE toolchain) and Kinetis Software Development Kit (peripheral libraries). 

Computer and boards will be provided during the workshop session.


All Freescale experts and several 3rd parties will be present to answer your questions.

More than 45 application demos will be exposed in the 620m² Techlab based on latest Freescale technologies (ARM Cortex-M Microcontrollers, ARM Cortex-A Processors, Motion Sensors, Radio, Analog).


And the best for the end ... This is a 100% free event including lunch and drinks.


I have posted below the official invitation and the link to register (please select Farnell as distributor for our invitation statistics).


Don't hesitate to answer this blog if you have some questions.


Nice to meet you there

 

Sans titre 1.jpg

Designing with Freescale Seminar, Paris Roland Garros, 14 Octobre 2014

Freescale a le plaisir de vous inviter à son événement technologique phare de l’année.

Ne manquez pas cette occasion de participer à notre journée de présentations et de formations portant sur nos technologies, produits et solutions pour l’électronique embarquée.

Designing with Freescale (DwF) offre des sessions interactives sur une large gamme de solutions Freescale pour les ingénieurs développant des produits et systèmes innovants.

 

Lors de cette journée, vous pourrez découvrir et participer à :

 

- Des sessions techniques présentant nos différentes familles de produits : microcontrôleurs et microprocesseurs basés sur les architectures ARM® et Power Architecture®,

capteurs, circuits analogiques, connectivité couvrant les marchés automobile, industriel, grand public et réseaux.

 

- Un Techlab de 620m²où seront exposées plus de 45 démonstrations d’applications mises en œuvre par Freescale et ses partenaires.

 

- Une formation ‘’hands-on’’ pour créer votre première application dans le monde de l’Internet des Objets (IOT).Grace à la carte communautaire  RIoT,

vous testerez toute la puissance de son processeur ARM®  i.MX 6Solo. Ses accessoires vous montreront comment il est rapide de

développer cette application sous un Operating Système Linux ou Android et connectée au ‘’Cloud’’.

 

- Une formation ‘’hands-on’’ sur les capteurs basée sur la plateforme de développement Freescale Freedom. Vous découvrirez notre outil de développement

de logiciels pour les capteurs Xtrinsic sensing solutions et comment  programmer le code dans un microcontrôleur de la série Kinetis.

 

- Une table ronde sur l’Internet des Objets avec des experts dans les domaines des plateformes logicielles, de la sécurité des systèmes ainsi que de la connectivité.

 

Si vous êtes intéressé par cette opportunité unique, cliquez sur le lien ci-dessous pour découvrir l’agenda détaillé et vous enregistrer.

 

En savoir plus et s’enregistrer>>

skipbruce

PCB stack-up design

Posted by skipbruce Aug 21, 2014
PCB Stack-Up Design

Before designing multi-layer PCB circuit boards, designers need to confirm the circuit boards structure primarily based on the scale of circuit, the size of circuit boards, and the requirements of electromagnetic compatibility (EMC). It means that designers have to decide to use 2, 4, 6, or more layers of circuit boards. If the design requires the use of high density ball grid array (BGA) devices, the minimal number of wiring layers required for these devices must be considered. For years, people always believe that the less PCB layers, the lower the cost, however, there are many other factors affecting PCB manufacturing costs. In recent years, the differences between costs of multi-layer boards have been reduced significantly. As soon as the number of layers been determined, the placement of the inner layer and how to distribute different signals in these layers can then be decided --- this is the stack-up design of multi-layer PCB. Careful planning and choosing rational stack-up designs beforehand will save a lot of efforts in the following wiring and future production.

 

1.1 Layer Selection Principle

There are many factors to consider when determining the number of layers of multi-layer PCB board. For experienced designers, they will emphasize on the analysis of the bottlenecks of PCB wiring after the pre-placement of devices. In combination with other EDA tools to analyze wiring density of circuit board; and combined with the quantities and kinds of signal lines with specific wiring demands, such as differential lines, sensitive signal lines, to determine the number of signal layers; and then to determine the number of internal power layer according to the type of power supply, isolation and immunity requirements. Therefore, the layer number of the whole circuit board plates is basically determined.

The following table is the empirical data to determine number of signal layers based on the PIN density, for reference.

Ps: Definition of PIN density: Area of board (square inch)/ (Total number of pins on the Board/14)

 

1.2 PCB Stack-Up Principle

After the number of circuit board layers determined, the following job is to reasonably arrange the placement order of the circuit of each layer. In this part, there are two main factors to be considered:

(1) The distribution of special signal layers

(2) The distribution of power layer and ground layer

The more layers of circuit boards, the more varieties of arrangement of special signal layers, ground layers and power layers, thus it is more difficult to choose the best combination method, but the general principles are as follows.

(1) The signal layer should be next to an internal power layer (internal power/ground layer), shielded by the copper film of internal power layer.

(2) The internal power layer should be integrated with ground layer tightly, which means the thickness of medium between internal power layer and ground layer should take the smaller value, in order to improve the power supply capacitor between the internal power layer and ground layer, and increase the resonant frequency. If the electric potential difference between internal power layer and ground layer is not significant, a smaller insulation thickness can be used, like 5mil (0.127mm).

(3) To avoid the two signal layers directly adjacent. It is easy to introduce crosstalk between adjacent signal layers, leading to the fail of the circuit. To place a ground layer between two signal layers can avoid cross talk efficiently.

(4) Multiple grounded internal power layers can reduce the ground impedance effectively. For example, A signal layer and B signal layer use ground plane respectively can reduce common-mode interference effectively.

(5) The symmetry of layer structure.

 

1.3 Demonstration

For your reference, a stack-up design for the four, six, and eight layered high speed digital signal PCB is demonstrated in below:

1.3.1 Four Layer Stack–Up

Figure 1.3.1 Four Layer PCB Stack-Up Example

The high speed signals on the top layer are referenced to the ground plane on layer 2. Since the references for the high speed signals on the bottom layer are the power planes on layer 3, it is necessary to place stitching capacitors between the aforementioned power planes and ground. In this stack up, it is preferential to route high speed signals on the top layer as opposed to the bottom layer so that the signals have a direct reference to the ground layer. For some designs it may be desirable to have the bottom layer as primary high speed routing layer. In this case, the power and ground usage on Layer 2 and 3 could be swapped.

1.3.2 Six Layer Stack-Up

 

Figure 1.3.2 Six Layer PCB Stack-Up Example


In this example, the reference planes for the high speed signals on the top layer are the power planes on layer 2. Stitching capacitors from the associated reference power plane to ground are therefore required. The signal reference for the bottom layer is the ground plane on layer 5. In this stack-up, it is preferable to route high speed signals on the bottom layer. As in the previous example, power and ground layers could be swapped if it is desirable to have the primary high speed routing layer on the top layer.

The reference planes for signals on layer 3 are located on layer 2 and 5. The same reference planes are used by signals routed on layer 4. As the reference planes are on layers which have a relatively large distance from signal layers 3 and 4, the traces would need to be very wide in order to achieve a common impedance of 50Ω. Therefore, these layers are not suitable for routing high speed signals. In this stack-up approach, layers 3 and 4 can only be used for routing low speed signals where impedance matching is not required.

1.3.3 Eight Layer Stack-Up

Figure 1.3.3 Eight Layer PCB Stack-Up Example


The signals on the top layer are referenced to the plane in layer 2, while the signals on the bottom layer are referenced to layer 7. The reference planes for signal layer 3 are the ground plane on layer 2 and the power planes on layer 4. When routing high speed signals on layer 3, stitching capacitors need to be placed between the power and the ground planes. The power planes on layer 5 and 7 are used as references for the high speed signals routed on layer 6.

The inner layer 6 with the two adjacent ground planes is the best choice for routing high speed signals which have the most critical impedance control requirements. The inner layers cause less EMC problems as they are capsulated by the adjacent ground planes. As layer 3 is referenced to a power plane, outer layer 1 and 8 are preferable for high speed routing if layer 6 is already occupied.

em_strings

Embedded Systems

Posted by em_strings Aug 21, 2014

Hi ,

 

Embedded Strings inc  is a well-established company which specializes in the design, development, testing and manufacturing of complex embedded systems/Hardware. Our target markets are healthcare, telecommunication, aerospace and remote monitoring.


We have delivered customized hardware and software products that have application in wireless sensor networking, wireless tracking, digital signal processing and innovate medical monitoring devices.


We specialize in Field Programmable Gate Array design , we have developed our own VHDL/Verilog ip cores that have been integrated in high performance embedded systems, Nios SOC , ARM SOC and Digital Signal Processing.


We also have in-house resource to design multi-layer PCB using leading edge design tool Altium.


Please feel free to contact us in case you need to utilize any of the services that our company provides. We guarantee you complete security and confidentiality of information that you will share with us.

 

 

Thanking you ,


Ahmed Asim Ghouri

Embedded Strings inc

Website : www.emstrings.com

Email : support@emstrings.com

A Sensing node consists of methane gas sensor, carbon monoxide gas sensor, accelerometer sensor, temperature sensor and RS232 interface circuit with dual port RAM. Methane gas sensor and carbon monoxide gas sensors are placed on stationary node because its concentration is lighter than so it detects near the roof of the mine. The purpose of using accelerometer is to detect the earth quake type of activities. The Sensing node gets data from neighbouring Sensing node and sends its data to the next Sensing node.

 

The main computing microcontroller in this Hardware is CC430F6137. There are various gas sensors connected to Sensing node which will help monitor explosive and toxic gases within the mine environment. To monitor any structural change in the mine the Sensing node will analyze accelerometer data and to prevent any fire it will also monitor temperature inside the mine.

 

Block_dia.jpg

 

 

There are number of sensors connected to the microcontroller as shown in figure 5.The data of some of these sensors will be captured by built-in 12 bit ADC inside the CC430f6137.To extend the addressable memory an external SRAM has been connected via SPI interface whereas Accelerometer is connected via I2C bus.

 

Schematic Design

 

The complete schematic design of Sensing node comprises of 3 sheets which are connected with each other using off sheet connectors. The first sheet has a main computing unit of CC430 with CO sensor circuit, Methane gas sensor, Accelerometer and battery monitoring circuit. The second sheet has a RF matching circuit for CC430 RF Radio Core and the 3rd sheet has a power supply circuit for power-up all the modules.

 

 

Schematic_Sensing_node.jpg

schematic design of Sensing node. The gas sensor output is connected to the voltage clipping circuit because the A/D of CC430 can read maximum of 3.3V and gas sensors output varies from 0V-5V.The Output of clipping circuit is connected to CC430  via A/D convertor. The A/D reads the output of Methane and CO gas sensor and translates its voltage level to the respective gas concentration. The Accelerometer is connected to CC430 via I2C interface. The battery monitoring circuit output is connected to A/D of CC430. A/D read the value of voltage from battery monitoring circuit and displays the status of the battery on respective LED. A 1Kbit of SRAM is included to stationary node due to insufficient internal memory of CC430.

 

 

 

RF_matching_ckt.jpg

 

Following is the power supply circuit diagram supplying +3.3V and +5.0V

 

power_ckt.jpg

 

During testing we were able to send and receive data at a distance of 100 meters with RF power output of +12dbm

 

Embedded Strings inc  is a well-established company which specializes in the design, development, testing and manufacturing of complex embedded systems/Hardware. Our target markets are healthcare, telecommunication, aerospace and remote monitoring.


We have delivered customized hardware and software products that have application in wireless sensor networking, wireless tracking, digital signal processing and innovate medical monitoring devices.


We specialize in Field Programmable Gate Array design , we have developed our own VHDL/Verilog ip cores that have been integrated in high performance embedded systems, Nios SOC , ARM SOC and Digital Signal Processing.

Please feel free to contact us in case you need to utilize any of the services that our company provides. We guarantee you complete security and confidentiality of information that you will share with us.

 

 

Thanking you ,


Ahmed Asim Ghouri

Embedded Strings inc

Website : www.emstrings.com

Email : support@emstrings.com

skipbruce

PCB Panel Design

Posted by skipbruce Aug 18, 2014

1.5 Printed Cuicuit Board Panel Design

There are two problems to consider when design panel: one is how to place the boards; and the other is the way of connection.

1.5.1  Panel Layout

Panel can increase productivity and save on production costs; the first thing to consider in panel design is how to place small plates together to make a lager board. It is recommended that the basis of panel design is when the final size is close to the ideal size (Figure1.2.1).

1.5.1.1 PCB board’s long side length ≥ 125mm

When PCB board’s long side length ≥ 125mm, the boards can be placed as Figure 1.5.1.1 shows. The perfect number of boards is achieved when the final size is consistent with as (Figure1.2.1) requires. The stiffness of this placement is beneficial for the wave-soldering. Figure 1.5.1.1(a) is a typical panel, and Figure 1.5.1.1(b) is suitable for the situation that the rounded corners required after the separation of daughter boards.

(a) V-shaped groove separating method

 

(b) Slotted hole separating method

Figure 1.5.1.1 Panel

1.5.1.2 PCB Board’s long side length < 125mm
When PCB board’s long side length < 125mm, the boards can be placed as Figure 1.5.1.2 shows. The perfect number of boards is achieved when the final board length is consistent with as Figure1.2.1 requires. When this method is used, the rigidity of boards should be concerned. Figure 1.5.1.2 (a) is a typical V - shaped groove separated panel, there are three perpendicular craft edges to the PCB transfer direction with double-sided deposited copper foil, to enhance the stiffness. Figure 1.5.1.2 (b) is suitable for the situation that the rounded corners required after the separation of daughter boards, and the joint stiffness of separated sides paralleled to the PCB transfer direction should be concerned.

 


(a)V-shaped groove separating method


(b) The Long Slot plus a Small Circular Hole Separating Method

 

Figure 1.5.1.2 Panel

1.5.1.3 Panel of Sketch Plate

Pay attention to the connection between panel and panel, and try to keep each separated connection in a line, as 1.5.1.3 shows.

(a) L Shaped Panel

(b) T Shaped Panel

Figure 1.5.1.3 Panel of Sketch Plate

1.5.2 Connection of Panel

There are two main connection methods for panel: Double face carved V-shaped groove (V-CUT), and the long slot plus a small circular hole (commonly known as stamp hole), depending on the shape of the PCB.

1.5.2.1 V-CUT connection method

When it is straight-lined connection between plate and plate, the plate margin is neat and does not affect devices installation; the V-CUT method can be used. V-CUT is a through type, and cannot turn in the middle. Currently SMT Board is widely used, characterized with neat and level edges after separation and low processing costs, which is recommended as priority.

a) The two sides of V-CUT line (A side and B side) require a no device and no wire area that is not smaller than 1mm, to avoid the damage to devices and wires when separating.

b) After cutting the V-shaped groove, the remaining thickness X should be 1/4 to 1/3 of the board thickness Y, which is not smaller than 0.4mm. Board bears heavier can take upper limit, and vice versa. The misalignment of the upper and lower sides cut S of V-shaped groove must be less than 0.1mm.

The design requires being consistent with Figure 1.5.2.1.

Figure 1.5.2.1 Design Requirements of V-Cut

1.5.2.2 The Long Slot plus a Small Circular Hole Connection Method

The connection method of long slot plus a small circular hole, also known as stamp hole method, is suitable for any shapes of daughter boards. As the margin area is not neat and level after separation, it is not recommended for those PCB with fixed conduit ferrule.

Requirements for the long slot plus a small circular hole method: The width of long slot is usually between 1.6mm and 3.0mm, and the length is about 25mm to 80mm, the connection bridge between slot and slot is generally 5mm to 7mm, with several small circular holes placed, and the diameter Ф of these holes is 0.8mm ~1 mm, the distance from the center of the aperture to the outside is 0.4mm – 0.5mm: Thicker boards take smaller value and thinner boards take larger value, it is a typical value in Figure 1.5.2.2. The length of the cutting groove is based on the PCB routing directions, assembly process, and the size of PCB. The smaller the aperture, the neater the margin area.

Figure 1.5.2.2 The Long Slot plus a Small Circular Hole Method

1.5.2.3 The Design of Connection Bridge

When design connection bridge, it is mainly to consider: whether the margin area after separation is neat or not; whether it is convenient to separate or not; is the stiffness enough for production; the material, thickness and total weight of single plate; the distance between connection bridges (the recommended distance is 60mm). In order to make the margin area neat after separation, the separating holes are usually placed on the sidelines or slightly within the daughter board.

In PCB (Printed Circuit Board) design, it is best not to exceed the batch-production technology level of manufacturers. Otherwise, the PCBs may not be able to be processed, or have high associated costs.

1.1 Range of Dimensions

The ideal dimensions for production are as follows: width (200mm-250mm), length (250mm-350mm). For a PCB with length shorter than 125mm or width shorter than 100mm the panelization method can be used to transform the dimensions of the PCB to ideal values according to requirements of production. This facilitates component insertion and soldering.

1.2 Shape

a) The shape of the PCB is rectangular. If a PCB does not need a panel, the four corners of the plate must be rounded as shown in Figure 1.2.1. If a panel is needed, the four corners of the PCB must be rounded after being panelized, with radius 1mm-2mm.

Schematic Diagram of PCB Shape

Figure 1.2.1 Schematic Diagram of PCB Shape

To ensure stability in the transmission process, the penalization method is used to transform irregularly shaped PCBs. Specifically, the gap on the corner must be supplemented, as shown in Figure 1.2.2. Otherwise, special tooling design is needed.

Schematic Diagram of Technological Panelization

Figure 1.2.2 Schematic Diagram of Technological Panelization

b) To ensure that the PCB is stably transferred by chains, any gap on a pure SMT must have length shorter than 1/3 of the corresponding edge, as show in Figure 1.2.3.

 

Permitted Size of Gap

Figure 1.2.3 Permitted Size of Gap

c) Figure 1.2.4 shows design requirements for gold fingers: chamfers are designed on the insertion edge as required; (1-1.5) x 45o chamfers or (R1-R1.5) circular beads should be designed on the two sides of the insertion board to facilitate insertion.

Design of Chamfer of Gold Fingers

Figure 1.2.4 Design of Chamfer of Gold Fingers

 

1.3 Technology Edge

For a PCB without a technology edge, scopes that are 5mm or further than 5mm from the positive or negative edges of the board cannot have any components or soldering spots; and the wiring position must be at least 3mm from edges of the board. If short-insertion wave soldering is adopted, the board must meet the width requirements of general transfer edges, and the height of components 10 mm from board edges must be limited to 40 mm (containing the thickness of the board), in consideration of the characteristics of short-insertion wave braziers, as shown in Figure 1.3.1.

 

Schematic Diagram of PCB Transfer Edge

Figure 1.3.1 Schematic Diagram of PCB Transfer Edge

If the size of the keep-out area on the transfer edge of the PCB board cannot meet above-stated requirements, a 5mm or wider processed edge must be added to the corresponding board edge. The smoothing radius of the processed edge is 2mm, as shown in Figure 1.3.2.

Design Requirement 1 of PCB Technology Edge

Figure 1.3.2 Design Requirement 1 of PCB Technology Edge

To meet the special requirements of structural design, if a component protrudes from the transfer edge of the PCB, the width of the auxiliary edge must meet the requirements shown in Figure 1.3.3.

Design Requirement 2 of PCB Technology Edge

Figure 1.3.3 Design Requirement 2 of PCB Technology Edge

1.4 Fiducial Mark

Fiducial marks are needed for the placement of equipment adopting optical locations. They are used for overall automatic location of chip mounters, and must have high contrast ratios when illuminated by a chip mounter.

1.4.1 Design of Fiducial Marks

Requirements of appearance design of fiducial marks are as follows:

1. Solid circle;

2. Inner diameter = 1mm;

3. Ring-shaped radius of the solder mask is 0.5mm, as shown in Figure 1.4.1.

Schematic Diagram of Fiducial Mark

Figure 1.4.1 Schematic Diagram of Fiducial Mark

1.4.2 Application of Fiducial Marks

Fiducial marks are mainly applied to panel, plate and local positions, as shown in Figure 1.4.2.

Application of Fiducial Mark

Figure 1.4.2 Application of Fiducial Marks

1.4.2.1 Global Fiducials

Three fiducials must be selected from the four corners of the board. If both the surfaces of the board have placement components, each surface must have fiducial mark, as shown in Figure 1.4.3.

Location of Fiducial Mark on the Plate

Figure 1.4.3 Location of Fiducial Mark on the Plate

1.4.2.2 Panel Fiducials

Global fiducial marks of three panels are required. The diagonal point of each panel should have at least two fiducial marks. In special situations, you must negotiate with technologists to determine whether the two fiducial marks on two panels can be omitted or not. However, the global fiducial marks of the panels must be reserved.

1.4.2.3 Local Fiducials

The lead pin pitch is smaller than 0.4mm. For QFP packaging chips with more than 144 lead pins, two marks at opposite corners of the chip need to be increased. If the above-stated components are close (with distances smaller than 100mm), they can be regarded as a whole, and two local fiducials need to be increased on the diagonal position, as shown in Figure 1.4.4.

Local Position of Fiducial Marks

Figure 1.4.4 Local Position of Fiducial Marks


The RN4020 Bluetooth Smart Module is Microchip Technology’s, first Bluetooth 4.1 Low Energy module. It comes industry-certified and functions completely as a stand alone or in conjunction with any microcontroller.

 

The module not only functional immediately but also carries various international certifications right out of the box, including certification from Bluetooth Special Interest Group.

 

The RN4020 Bluetooth module also comes with the Microchip Low-energy Data Profile pre-installed, enabling immediate compatibility across the BTLE network. It is also stack-on-board and can either connect directly to Microchip’s line of PIC MCUs with a UART interface (or any microcontroller with a UART interface) and it can operate independently for basic uses, such as the collection and transmission of data.

 

It’s the first of its kind at Microchip and the micro tech giant hopes to provide developers with an easy solution for the next generation of wireless products that will eat up less power.

 

Microchip hopes that its RN4020 revolutionizes the development of Internet of Things devices by providing energy-efficient access to Bluetooth technology on a chip. If MCU-powered devices gain access to Bluetooth, they can revolutionize the industry, enhancing a wide range of products, from consumables to medical devices.

 

Imagine if pacemakers, for example, began utilizing Bluetooth technology. The device would not only save the life of its host, but could even transmit critically important data to doctors, such as technical malfunctions and abnormalities. There are a lot of requirements for on patient products including FDA approval; off the shelf Bluetooth product are not necessarily certified for use in medical care.

 

The RN4020 LE Smart module comes preloaded with useful profiles, such as MLDP, Bluetooth SIG low-energy, public and private profiles via the ASCII command interface.

 

The RN4020 also comes equipped with a PCB antenna, capable of 7 dBm transmission and -92.5 dBm receiving sensitivity over 300ft. The module itself is 11.5 x 19.5 x 2.5 mm and will retail to manufacturers and developers at $6.78 each, sold in quantities of 1000 units.

 

C

See more news at:

http://twitter.com/Cabe_Atwell

sony glow.jpg

A prototype of the FreFlow gone fashion accessory which may become a ‘must-have’ for concerts. (via SONY)


Sony may be bringing another risky product to market that may sink instead of swim. However, their prototype tested at concert venues was a success, so it seems the synchronizable glowing wristband may soon hit markets in the USA.

 

The new product is a riff on their FreFlow glow pen which takes the form of a wristband fashion accessory. The basic idea is that the LED equipped bracelets will flash colors in unison with the performer’s master lights. Hence, it is basically the ultimate rave gear.

 

Concert- goers went crazy for the FreFlow technology when it was tested by the Japanese Rock band, Fuji Fabric on October 24th, 2012. The FreFlow also allowed concert goers to manually change the color of their lights to fit their mood.

 

It seems that this technology was a big hit during the concert because it give a feeling of collectivism with the performers and audience. However, who knows how a capitalistic, individualistic society (yes I mean us)will judge these unison rave bracelets.

 

The main concerns are also the logistics of these products as there would need to be someone controlling the remote-controlled master wireless transmitter and concerts would have to support the technology. This provides many barriers as concert venues would probably have to buy thousands of these little gadgets and pass them out to concert attendees; which could happen. But, then the venue would have to get the bracelets back which is less likely to happen as attendees may want a free souvenir.

 

Another market strategy could be that people would buy them and concert venue can have the technology available for use. However, it kind-of ruins the feeling of collective euphoria to distinctly separate the haves from the have-nots.

 

Whatever strategy Sony takes to bring these gadgets to market, I am sure the world will learn to live with, or without them.

 

 

C

See more news at:

http://twitter.com/Cabe_Atwell

When Selecting your capacitor for your embedded products, do you have to consider:

 

• Electrical characteristics.

• Stability.

• Longevity.

• Reliability.

• Safety.

• Life cycle cost.

 

Panasonic Launches its Polymer Capacitors to the market, which provides a great technical solution for Embedded products.

Panasonic Polymer offer 4 advantages VS other product technologies.

 

The Polymer technology offers fantastic Frequency Characteristics.

Thanks to their ultra low ESR values, polymer capacitors have a low impedance neartheir resonance point (see Image Below). And lower impedance reduces AC ripple in power circuits.

Panasonic testing has revealed as much as a fivefold reduction in peak-to-peakvoltage changes when comparing polymer capacitors to conventional low-ESR tantalum capacitors.


Slide1.JPG

Stable capacitance

With ceramic capacitors, capacitance drifts in response to temperature changes and DC bias.

Polymer capacitors have no such problem and remainstable over time .This stability is particularly important in industrial and automotive applications, which tend to experience fluctuations in operating temperatures. We’ve seen cases where elevated temperatures caused an effective capacitance loss of 90% or more for ceramic capacitors, meaning that the conventional capacitor.

 

Stability in Life time .jpg

 

Enhanced safety.

Conventional electrolytic capacitors can suffer from safety issues that could cause them to short circuit and fail. The problem arises when electrical or mechanical stresses create defects or discontinuities in the oxide film that forms the capacitor’s dielectric. Polymer capacitors have a self-healing capability that eliminates this failure mode.


The repair takes place in response to the joule heating that occurs when a dielectric defect triggers a short circuit. The heating breaks the molecular chain of the conductive polymer near the defect, driving up its resistance and effectively forming a barrier against any current leaking from the electrode In the case of hybrid capacitors, an additional self-healing mechanism comes into play—because the liquid electrolyte causes current flow near the defect to reoxidize the aluminum. We have conducted numerous over-voltage tests to demonstrate the self-repairing nature of polymer and hybrid capacitors. One such test compared our SP-Cap polymer capacitors to a conventional tantalum-MnO2 capacitors. The polymer model withstood short currents as high as 7 amps, while the tantalum capacitor started smoking at 3 amps and ignited at 5 amps. This safety enhancement has important design and cost implications. Conventional tantalum capacitors are normally derated in use by 30 to 50% their labeled voltage to ensure that they operate safely. This derating, while a common and accepted engineering practice, results in an upsizing of capacitors and increased cost. For our polymer capacitors, by contrast, we guarantee operation at 90% of the full-rated voltage.



 

If your application/design needs, High Reliability, High Efficiency, Low ESR, High Ripple Current or your looking for a Smart Alternative to Tantalum Capacitors maybe you should consider using Panasonic Polymer.


Link For Samples: Capacitors | Power Capacitors | Farnell UK




Microchip Technology Inc., recently announced a new line of eXtreme Low Power PIC microcontroller that are more secure, more cost effective and feature faster throughput. Your home phone technology will never be the same.

 

Microcontrollers are tiny computers that are programmed for very specific functions, such as running our household appliances. They are also very unique, in that they must run on extremely low power and are expected to last for more than a decade or two.

 

From running the microwave and home phone to powering many emerging products within the Internet of Things, these cheap, simplistic chips power much of the world around us. Because of their importance, Mircrochip, a leading manufacturer of microcontrollers, decided to up its game-on-a-chip with its new XLP line, the PIC24F ‘GB2’ family.

 

The PIC24F line features a hardware crypto engine, One-Time-Programmable passcode storage and Random Number Generator for increased security. It also runs on less energy while in sleep mode, in which MCUs remain more than 90 percent of the time.

 

The PIC24F microcontroller line also features up to 128KB Flash and 8KB RAM hardware in packages that vary from 28 to 44-pin. Microchip says its line is ideal for IoT sensor nodes, security systems and units with keyless access. The microcontroller ‘giant’ also claims the GB2 line allows for faster throughput, longer battery life (180 µA/MHz Run currents and 18 nA Sleep currents), more secure data and lower cost.

 

Microchip is convinced its new nanotechnology will have a large impact within the world of the IoT. With enhanced security, PIC24F microcontrollers may find their way into the growing industry of home automation. Also, with longer battery life and less energy consumption, the PIC24F chip may become a favorite among pacemaker manufacturers too.

 

PIC24F GB2 chips will work seamlessly with Microchip’s entire line of programs and tools for developers. The chip will sell with and without USB access and will be available to manufacturers in SOIC, SSOP, SPDIP and QFN packages starting at $1.30 each when purchased in volume.

 

While the new microcontrollers will last longer and consume less power, it is often not the microchip, but the hardware of a device, that fails us long before the 20-year mark. Microchip told me during an interview at Sensor Expo 2014, they are definitely not expanding into the mobile (smartphone) industry. However, Microchip continued that they may find a way to extend the life of our household appliances then they will really be in business. Here’s hoping.


 

C

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Trinity College Dublin researchers produce graphene in quantity using mechanical exfoliation.

 

Just about everyone knows that the 1-atom thick wonder material, graphene, is poised to take over the world of electronics. Its electrical properties alone would allow manufacturers to build CPUs that could run in the 100GHz range, that’s how unusually great the material is. The only problem is, we do not know when this will happen due in part because it has always been difficult and expensive to manufacture the material in bulk.


Current methods of graphene production include reduction processes (usually in oxide form), sonication (graphene oxide film applied to a DVD and burning it in a DVD writer) and heating silicon carbide to high pressures (among a handful of other methods). The trend of producing graphene using these slow and inefficient methods may be over with, thanks to some clever researchers from Trinity College Dublin’s AMBER department.


Their method of producing the material in bulk is based on the first technique pioneered in 2010- using adhesive tape to grab layers of graphene, otherwise known as the mechanical exfoliation method. Instead of using ‘Scotch Tape’ to grab flakes of graphene, the team used a stabilizing fluid mixed with the material and fed it into a shear-mixer. The mixer shears off sheets of graphene at a sufficient size that qualifies at ‘industrial levels’, claiming that their exfoliation method can be achieved using a few millimeters of liquid up to hundreds of liters and more. This breakthrough could open the door to manufacturing graphene on enormous scales at reduced costs, allowing electronics manufacturers to incorporate the material into their next-gen products.


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Will graphene allow us to truly have a flexible phone? Samsung thinks so.

 

One of those electronics manufacturers is already eying the material for truly flexible electronics. Graphene beats out silicon for electron mobility 100-times over and is more durable than steel, has incredible heat conductibility (meaning it dissipates heat very well) and flexible to boot, which is why Samsung is eyeing it for flexible displays, wearable computing and mobile devices.


The tech giant has collaborated with Sungkyunkwan University to develop a synthesis method of producing the material in bulk. Unlike the AMBER department’s exfoliation technique, Samsung has adopted the multi-crystal synthesis method to synthesis ‘large-area’ graphene into a single crystal on a semiconductor. Multi-crystal synthesis tends to reduce the electrical and mechanical properties of graphene, however the collaborative effort at developing the process of depositing a single crystal on a semiconductor at wafer-scale sizes has allowed the graphene to retain its properties.


To put it simply, their method of fabricating the wonder-material results in sheets of graphene at wafer size, making it possible to mass produce new electronics in the near future rather than decades from now. While the prospects for incorporating graphene into everyday electronics is becoming a reality, powering those devices is a whole different story but may be possible using something the Earth has an abundance of.


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Chinese scientists use graphene and saltwater to produce an electrical charge.

 

Powering our mobile devices is typically done through a rechargeable Li-ion battery but that may soon change, thanks to some ingenious Chinese scientists. Humans have been using water for power as a renewable resource through the use of hydroelectric dams, however to gain a powerful enough charge, the dams need to be large. This presents a problem when the technology is scaled down, as generating electricity at small levels is wholly inefficient.


To that end, scientists have been investigating grabbing a charge at nano-scale levels using nano-structures. Scientists have found that a significant charge could be garnered by passing ionic fluids through a pressure gradient, however even that is limiting due to that pressure gradient needed. As luck would have it, the Chinese science team found that passing a saltwater droplet over a sheet of graphene could produce an electric charge without the need for a pressure gradient.


The team found that when a droplet of saltwater sat static on the material, they carried an equal charge on both sides, however when they slid the droplet from one side to the other, it generated measurable voltage along the way. In fact, they found the faster the droplet moved, the more voltage it creates! While the initial generated charge was only around 30-milivolts, it presents future options to power our mobile devices if it can be refined and developed upon. Until then, we will still have to use the tried and true Li-ion to listen to music, watch our favorite shows and converse with our friends.


C

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Engage with ST, join the contest!  in collaboration with ARM Connected Community ST is organizing the STM32 Internet of Things Design
Contest  EMEA Edition
.
We believe in the creativity of engineers and challenge them to invent the next big Thing for IoT, to design around the STM32 family of ARM® Cortex®-M microcontrollers and ST’s other industry-leading components
. ST will assist the finalists in turning their dreams into reality with technical
support during the development phase and can help in bringing the winning solution to market.

You can register for this exciting contest and send us a project description and a video of your innovative application (all information into Terms&Conditions). You could be one of the three lucky winners to be invited at an award ceremony at Electronica in Munich to collect your prize: a Hyetis Crossbow - the first and only Swiss Made Luxury SmartWatch.
Contest Rules
Candidates are challenged to develop an Internet of Things application based on at least one STM32 microcontroller and as many other ST components as possible (at least one other required). Registration and submission of projects are open on ST Facebook.
An ST panel will select ten project finalists based on the following criteria: level of innovation, ST product content, feasibility, functionality, technical merit, usefulness.
The videos describing the finalists applications will be posted mid September on the web site and three winners will be elected by the “embedded community”with a voting system open until end of October.

The winners will be invited to attend an award Ceremony during Electronica in Munich - November 11th-14th.



Microcontrollers
Smart Grid

Internet of Things

SMART & ALTERNATIVE TECHNOLOGIES

Development Tools and Solutions

Sensors



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California’s BPPE sets its sights on coding bootcamps (via stock)


Education is one of the biggest issues the younger generations are facing today. According to the OECD (Organisation for Economic Co-operation and Development), the US is lagging far behind other countries when it comes to the sciences, math and even reading (based on the 2012 PISA exam). These statistics will undoubtedly limit what jobs will be available to the students of today, a good portion of which will be in the technology sector with a focus on coding and programming. According to the Bureau of Labor Statistics, the demand for healthcare IT and mobile networks professionals will, in turn, promote an increased demand for programmers, systems analysts and support technicians to the tune of 22% of those currently employed by the year 2020. In an effort to keep those potential jobs from going offshore, the US government, tech companies and academic institutions have initiated several programs that bring the computer sciences to classrooms and other learning centers. Several nonprofits, including Code.org, Khan Academy and MIT’s Scratch have sprung into existence since 2012 to give kids a leg-up on the skills needed to land one of those tech jobs by providing the necessary tools online. The popularity of those programs has invaded classrooms all over the globe (programming has become part of the sciences in some schools) and as a result, has spawned a slew of independent programming and coding schools in the US. This also brought on the rise of ‘coding bootcamps’ where students get a crash course on programming in weeks rather than months or years. As those programs have risen in popularity among high school kids, it also caught the attention of regulators who have recently taken a closer look at how those camps are run and what classification they fall under as an academic institution.

 

In recent weeks, California’s Bureau for Private Postsecondary Education (BPPE) has issued ‘cease and desist’ orders to several coding camps, including Hackbright Academy, Hack Reactor and App Academy (along with a few others) in an effort to bring those institutions up to code. The BPPE is an offshoot of the California Department of Consumer Affairs (NOT the Department of Education) and is tasked at regulating private institutions of post or secondary education, which includes vocational schools and other academic institutions.  The problems seem to be that those programming bootcamps did not (or were not aware of the need to) register or apply for a license with the BPPE and are therefore not in compliance with regulations and guidelines set forth by the regulatory commission. Those bootcamps were issued the C&D orders, which stated either they comply with the guidelines or be forced to shut down and face a hefty fine of $50,000. To get a better understanding of the situation, online programs like Code.org are free to anyone who wants to learn the basics of programming while the coding bootcamps charge anywhere from $10,000 and upwards for a 10-week full-throttle course in specific programming languages. Regulation and oversight when it comes to that kind of money isn’t necessarily a bad thing, however the regulations set down by the BPPE are somewhat archaic in nature when it comes to the digital age. For example, if the institution offers a degree program (which most of those bootcamps do), they must have a library and other learning resources, complete with a professional librarian or information specialist. Suffice it to say, the Application for Approval to get those bootcamps up to regulation is staggering to say the least, which is putting those institutions under immense pressure as they attempt to continue to operate.

 

It should be noted that some of these programs incorporate diversity within their respective communities. For instance, Hackbright specializes in teaching women to code in an effort to gain a competitive edge in the job market. Bootcamps can also help many unemployed Californians find jobs, which could only bolster the state’s ailing economy. Many coding institutions in the state however, fear that they will become bankrupt and forced to close as the application process can take up to 18 months and during that time, no classes can be taken and prospective students cannot enroll, which costs the institutions their income. It should also be noted that those coding bootcamps usually have a job-placement program in conjunction with many of the top tech companies in the nation, such as Google, Facebook and even Microsoft, which many students will miss out on if these camps go under. Most of the institutions that received the cease and desist letters are working to comply with the regulations to get back to the business of teaching, which consists of a $5,000 application fee, course catalog and a performance fact sheet on student progress (among other things). While some may feel that these camps are being unjustly singled out, others feel that regulation is necessary in order to deter fraud, such as implying a ‘guaranteed job after graduation’ (only the military can do that). The question is, does this signal an end to the ever-growing coding camps or will it only serve to solidify their credibility and could that scrutiny transfer over to schools that have implemented their own coding courses?

 

C

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Promo pictures of the kit. Seems like a good idea. I wonder how durable the paint is over time... (via Tony Yu & Kickstarter)


While technology has brought us the glorious touch screen phone, it has yet to bring us gloves that work well with the illuminated screens. Around this time of year, with snow and cold part of the equation in many places, most people are begging for phones with buttons to make a comeback, as the dinosaur phones are at least glove-friendly. Fret no more. Introducing: a “paint” that can make almost any surface touch-screenfriendly.

 

Tony Yu, like most winterers and bikers, was frustrated with the lack of conductive gloves that really work, so he developed Nanotips, a type of liquid that can make just about any substance conductive. The “paint” is a conductive polyamide solution that can be applied to your favorite gloves to turn them into touch screen capable gloves, without the need for conductive thread or sewing.

 

The paint comes in two different versions – Nanotips Blue, which is a transparent shade of blue intended for fabric and Nanotips Black, which is stronger, black in color and intended for tough material, including rubber or thick fabric like leather.

 

The liquid is applied similarly to white-out. The user only need to paint the substance on the index and thumb of their gloves, wait for it to dry and let the fun begin! One bottle of Nanotips Blue can be used for approximately 15 fingertip applications, while Nanotips Black needs less coats, so a bottle can cover up to 30 fingertip applications. It can also be used on other items, such as pens, to create a DIY stylus.

 

Nantotips creates a conductive channel on the gloves, or any surface, that recreates the touch of human skin on the touchscreen. Nanotips Blue also dries relatively transparently, even on light colors, while Nanotips black is solid black; something to consider before coating your crème cashmere gloves.

 

The solution is ready for mass production and the product reached its Kickstarter goal of $10,500 in only four days. They finished off at $72,133 CAD! The product will be available on pre-order for $18-20, depending on the type. The full retail price will be $22 for either serum.

 

C

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Audience eS700 voice processing chips. (via Audience)

 

With the myriad of NSA spying scandals hitting the headlines on a weekly basis, it’s surprising that it hasn’t over-shadowed the legitimacy of using ‘listening technology’ for touchless interaction with mobile devices. In that regard, Audience has released their eS700 line of advanced voice processing chips for sampling, which should be incorporated into new mobile devices by the second quarter of this year. Just like the new Kinect sensor from Microsoft, the chip actively ‘listens’ for voice commands, even while the device is off, to interact with the mobile device and navigate/use applications hands free (touch interaction is so early 21st century). The key behind their new chips is the inclusion of VoiceQ, which enable the chip’s always on feature that actively listens for key voice phrases in its immediate surroundings without the need to siphon off trickling amounts of power (less than 1.5mA) to do so. The technology also eliminates the pause-breaks associated with other devices in regards to those voice commands. For instance, users can turn on their devices and have them proceed to the needed function or app simply by saying ‘power on and play music’ for example, without the need to separate those commands. Other features of Audience’s new eS700 line include noise cancelation (even in windy conditions), speech restoration to increase voice quality in noisy environments and full-band 48 kHz voice processing. It also features a new programming API that allows OEMs to create apps that takes advantage of the voice interactive features and incorporate them seamlessly into their next-gen devices. While various manufacturers are already sampling the chips, its unknown as to exactly which ones will feature them in their new product lines.

 

The NSA doesn't officially endorse these new chips but they like what they 'hear'.

 

C

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