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5659 Views 7 Replies Latest reply: Sep 6, 2011 11:35 PM by Nazia Gadhia RSS
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Apr 30, 2010 6:50 AM

How to implement USB 3.0 with Altera Cyclone III FPGA ?

I am planning to implement USB 3.0 interface for Altera Cyclone III FPGA board. The need for USB 3.0 came from more speed requirements. SuperSpeed USB 3.0 supports a maximum data rate of 4.8 gigabits per  second offering 10x performance increase over Hi-Speed USB (USB  2.0).

 

Comparison  of USB 3.0 to USB 2.0

Features

USB 3.0

USB  2.0

Speed

Upto 4.8 Gb/s

upto 480 Mb/s

Signaling

Dual-simplex four wire differential   signaling

Two wire differential signaling

Data  flow

Full duplex

Half  duplex

Power Management

Multi-level which supports idle, sleep, and   suspend

Port-level that has two levels of   entry/exit latency

Cable  types

Shielded  differential   pair (SDP)

Unshielded twisted pair  (UTP)

Cable Wires

8 total

4 total

Traffic  Flow

Asynchronous

Polled

Packet  Traffic

Explicitly routed

Broadcast to all devices

What functional block and peripheral devices should be required in the Cyclone FPGA board design to implement SuperSpeed USB 3.0 interface ?Any suggestions/comments will be much appreciated.

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