Does the hard PCIe endpoint implementation with integrated PHY, transaction and link layer support have an impact on the power consumption versus a Cyclone-IV without PCIe?

Answer: The PCI Express HIP block will have a nominal impact on power consumption compared to the Cyclone IV E family. However they also have a significant advantage if the customer requires PCI Express, by saving cost, power and logic (compared to building the core in the FPGA) and Performance.

(These questions and answers are from the Cyclone IV webcast which was held on Thursday, November 19, 2009)