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Jeri Ellsworth

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Jan 27, 2011 9:53 AM

Need Help on custom ASIC, FPGA, system level and mechanical design spaces? Ask me a Question!

If you need help on custom ASIC, FPGA, system level and mechanical design spaces, please post your question here!

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Jeri Ellsworth

Jeri has 10 years of design experience in custom ASIC, FPGA, system level and mechanical design spaces, In addition to design work, she has extensive experience in production and pilot run failure analysis. She is well known for many of her popular electronic toys, SOC and video compression designs.

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Tags: design, fpga, expert, ask_expert, processor, reference, asic, mechanical, jeri_ellsworth, system_level

Lee Nelson

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1. Feb 4, 2011 8:50 PM (in response to Jeri Ellsworth)
Re: Need Help on custom ASIC, FPGA, system level and mechanical design spaces? Ask me a Question!

Jeri,

I am looking for the thread on the PIR sensor mentioned in the video.

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Lee Nelson

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2. Feb 4, 2011 10:36 PM (in response to Lee Nelson)
Re: Need Help on custom ASIC, FPGA, system level and mechanical design spaces? Ask me a Question!

I found it thanks.

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Jeri Ellsworth

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3. Feb 6, 2011 1:57 AM (in response to Lee Nelson)
Re: Need Help on custom ASIC, FPGA, system level and mechanical design spaces? Ask me a Question!

Got a little lost? Glad you found it.

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Laksen

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4. Feb 6, 2011 6:21 AM (in response to Jeri Ellsworth)
Re: Need Help on custom ASIC, FPGA, system level and mechanical design spaces? Ask me a Question!

I wonder, do there exist cheap prototyping services for ASICs, as there do for PCBs?

My current understanding is that creating all the masks is the most expensive part of the production(and other tool setup). Is this correct, and do there exist other cheaper methods?

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Jeri Ellsworth

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5. Feb 6, 2011 1:01 PM (in response to Laksen)
Re: Need Help on custom ASIC, FPGA, system level and mechanical design spaces? Ask me a Question!

You can share a portion of the masks with others to reduce the cost. MOSIS is a company that will do this. I beleive they have chips that are as low as $2000-$3000 range. Companies like ChipX, Atmel and eASIC have gatearray that only need metal layers and charge in the range of $10,000 a layer.

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Laksen

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6. Feb 6, 2011 7:43 PM (in response to Jeri Ellsworth)
Re: Need Help on custom ASIC, FPGA, system level and mechanical design spaces? Ask me a Question!

Thanks alot for the answer

It's still way out of my budget range, but slightly cheaper than I though it was

Interesting approach of sharing the masks. Are connection points(those gold wire connections) then shared, or can they easily place interconnect wires into some strange place of the chip?

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Jeri Ellsworth

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7. Feb 9, 2011 4:07 AM (in response to Laksen)
Re: Need Help on custom ASIC, FPGA, system level and mechanical design spaces? Ask me a Question!

The masks are typically stepped across the wafer forming the patterns for the chips. If the designs are small enough you can have more than one unique chip patterned for each step. (more than one type of chip on the wafer)

You might check out eASIC's electron beam patterned process that doesn't require masks. They wanted to charge a lot for synthesis and back end when I talked to them a few years ago, but maybe they've changed their position.

It's hard to beat FPGA's when you don't have a big budget.

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WestfW

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8. Feb 11, 2011 3:59 AM (in response to Jeri Ellsworth)
Re: Need Help on custom ASIC, FPGA, system level and mechanical design spaces? Ask me a Question!

So what aspects of a design will push it from being a CPLD-capable to needed a FPGA, and what will push the FPGA into needing an expernal CPU instead of one built internally? I'm prarilly a software hack, so the only thing I see pushing me to hardware is SPEED, and even SPEED is a bit iffy. What can I build to complement a mid-range microcontroller - will an N-channel PWM unit fit in a CPLD? An N-channel UART? when do I go to the FPGA?

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Jeri Ellsworth

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9. Feb 11, 2011 4:26 AM (in response to WestfW)
Re: Need Help on custom ASIC, FPGA, system level and mechanical design spaces? Ask me a Question!

CPLD's are typically lower gate count devices, but have the advantage of being instant on (no configuration delay) and sometimes very fast. FPGA's are higher gate counts and sometimes have high speed hardened IP like RAM, multipliers, etc, but maybe slower when gate counts are higher and require external configuration devices.
Be cautious when a vendors make "fmax" speed claims in devices, because they're usually calculated with very little logic between flops and localized signal routing. This is not scientific, but in my experience a larger design will run about 50% the speed rating of the device when you're not being terribly careful and 75% if you spend some time optimising.

UART and PWM aren't very complex designs, so CPLD's might be a good solution, since you don't need an external configuration ROM. Altera, Xilinx and Lattice all have free tool that you can simulate your design, before you choose a device.

-Jer

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lopezlaureano

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10. Feb 11, 2011 10:40 PM (in response to Jeri Ellsworth)
Re: Need Help on custom ASIC, FPGA, system level and mechanical design spaces? Ask me a Question!

Hi,
I have never worked with FPGA, I have done some work with GAL (Generic Array Logic) back in college about 20 years ago. I want to learn FPGA design what books do you recommend. Or how should I get started?

Thanks
Laureano

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WestfW

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11. Feb 12, 2011 3:04 AM (in response to Jeri Ellsworth)
Re: Need Help on custom ASIC, FPGA, system level and mechanical design spaces? Ask me a Question!

It usually seems like the things I would like to do are relatively simple, but require some modest amount of relatively slow RAM (put some FIFOs on that UART, for instance.) This always seems to push me into more complexity than I want to deal with. (Or is that an illusion? Should I consider an FPGA more complex than a CPLD, or is it all up to the tools after you write your VHDL/etc, and therefore irrelevant?)

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Jeri Ellsworth

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12. Feb 12, 2011 5:07 AM (in response to lopezlaureano)
Re: Need Help on custom ASIC, FPGA, system level and mechanical design spaces? Ask me a Question!

There are a lot of books. The Blue "HDL Chip Design" book is a great reference. ISBN0-9651934-3-8 The Rapid Prototyping for Digital Systems series is pretty good, because you get real world examples like display controllers, keyboard intefaces, CPU, etc

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Jeri Ellsworth

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13. Feb 12, 2011 5:09 AM (in response to WestfW)
Re: Need Help on custom ASIC, FPGA, system level and mechanical design spaces? Ask me a Question!

FPGA's do give you more RAM typically, but they're not any more difficult to write HDL's for.

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nursebob

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14. Feb 12, 2011 9:05 PM (in response to Jeri Ellsworth)
Re: Need Help on custom ASIC, FPGA, system level and mechanical design spaces? Ask me a Question!

Hi Jeri,

I'm a hobbyist who's actively trying to learn more about both electronics and microprocessors. I ran across your your PIR video which I found very illuminating. I've used an MSP430-based PIR to construct a motion-detecting, dark-activated LED night light (very dark bedroom with tripping hazards). In researching the project I found Zack Albus' articles on both the TI site as well as the Electronics Design site (http://electronicdesign.com/article/digital/pir-based-motion-detection-sensor-to-solution33099.aspx).
My question for you: I note you used an external opamp solution rather than Zack's proposal to use the 430's ability to detect the PIR's signal directly. Was your choice made so you could demonstrate the opamp in the circuit? Or were there other factors involved? TIA

Bob

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