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Path II Programmable

32 Posts authored by: buffteethr
I would like to say I thoroughly enjoyed working on the Path II Programming training project. As someone who does FPGA design for a living with a different manufacturer it was refreshing learning the Ultrascale FPGA and Vivado tools from Xilinx. Initially, my project entailed entailed  developing a video streaming solution. I planed to use Petalinux for the development until I cam across a post from another participant post about PYNQ ( PYNQ - Python productivity for Zynq - Home ).   P ...
Has anyone here run into an issue with the PYNQ v2.5 image for the Ultra96-V2 and WIfi? The wlan0 does not show up with the ifconfig command. I did some digging and noticed that there is NO wpa_supplicant.conf file is missing. ...
One of the Jupyter Notebooks that comes install with PYNQ is the USb Webcam. It captures an image from the C525 webcam, then converts it to black and white then rotates it. ...
Well I got the webcam finally. It is the C525 from Logitech. I tested it on Windows 10 first to make sure it work. I now have it plugged into the Ultra96-V2 and I am working on getting video through the system.   I am not connected to the wifi for some reason.     I am trying to figure this out now. ...
I have PYNQ running on my board. I am going through the process of learning the Jupyter Notebook and brushing up on my Python. Since I want the flexibility of working on my notebook code anywhere without my board I decided to install Jupyter on my Ubuntu 16 VM install.     It works but I am have a problem with the Kernel stability on Ubuntu.     It keeps restarting. I had some issue with the pip and ipython versions when I was installing everything so I am looking into ...
In the last lab of the Petalinux training I learnt how to: • Create and install a custom application into the Ultra96’s PetaLinux file system. • Compile a custom C application using a Makefile. • Build Ultra96’s PetaLinux from scratch (given a BSP) • Install the PetaLinux image onto the Ultra96   The source code and build files were provided as apt of the lab and the training involved editing the necessary files to make an apporpiate petalinux build ...
In Lab 5 I learnt how to: • Collect sensor data from SPI Sensors. • Use the MQTT IoT protocol to send data to servers. • Create JSON formatted information that IoT applications often use. • Setup my own IBM Bluemix Quickstart cloud service.   See the images below. I cannot get the WiFi at work to work with the Ultra96-V2 so I am still using a USB to 10/100 ethernet adapter for Internet Connection.     ...
In Lab 4 I learnt how to: • Import existing C/C++ programs into the Xilinx SDK Eclipse based development tool. • Develop PetaLinux user applications meaning: edit, compile, link, transfer and debug programs on the Ultra96 using the Xilinx SDK. • Read and use the /dev/SPIDev in Petalinux • Read and manipulate the LSM6DSL Sensor using Ultra96.   See the Images below:   I did have one issue. I could not get the Ultra96V to connect to my WiFi at work ...
I am on the final stages of the PetaLinux labs and about to start my project. Unfortunately, the apt and apt-get commands are not working and I cannot find away to install the commands. Any help would be appreciate. I need these commands for my project because I have to install opencv and other packages. ...
In lab 3 I built a more advanced hardware platform into a more feature rich PetaLinux system. Features for Networking, Wi-Fi, Bluetooth BLE and for using SPI devices through the Click Mezzanine and Low Speed connectors was added to the PetaLinux. To assist with debugging support for remote debugging was as well as support for the Linux Ext 2 and 4 file systems and additional utilities was also added. In lab 3 I learnt how to: • Create PetaLinux systems that load from SD Card • Use ...
Lab 0 and Lab 1 involved setting up the PetaLinux development environment wit the Xilinx SDOC tools. I used the latest version of the Linux tools 2019.1 instead of the 2018.3 version used in the training.  The minimal PetaLinux on the Ultra96 platform was installed. Even though minimal system was installed it is still feature rich and prepped me for larger PetaLinux image installs in future labs. At the end of these labs I learnt  how to: • Use the Xilinx tool chain in conjunct ...
Hi, Has anyone gotten these Errors when trying to build ?   | collect2: fatal error: ld terminated with signal 9 [Killed] | compilation terminated. | ninja: build stopped: subcommand failed. | WARNING: /home/buffteethr/petalinux/2018_3/support_documents/v2/lab2/lab2_example/build/tmp/work/aarch64-xilinx-linux/chromium/54.0.2810.2-r0/temp/run.do_compile.20276:1 exit 1 from 'ninja -v -j 2 chrome chrome_sandbox chromedriver' | ERROR: Function failed: do_compile (log file is located at /h ...
Ina previous lab I learnt scripting using tcl. This lab expands on the concept by teaching me how to do more complex automation using tcl. I used tcl scripting to finalize the hardware project to be used in developing Zynq MPSoC Software. IN this lab I learnt how to:   • Source a Tcl script • Understand the power of scripting • Understanding of the hardware platform that will be used in the Developing Zynq MPSoC Software TTC   TCL scripting was used to build the d ...
IP created is tested via simulation as well as in hardware. Embedded designs like Zynq MPSoC requires software to be written to test IP. The LogiCORE IP JTAG-AXI core was added in a previous last lab and the core was customized. It can generate AXI transactions and drive AXI signals internal to the MPSoC at run-time. It was used to test the IP. The JTAG-AXI core uses the Vivado Logic Analyzer and pre-built software was used to validate our test. The software application included an Interrupt Ser ...
Vivado has large IP catalog which makes it very easy to connect many of the common interfaces to designs. This lab provided step-by-step instructions on how to create custom IP, add it to the IP catalog, and then connect it to a design. The IP that we added was a Pulse Width Modulation (PWM) controller. It takes clock, duty cycle, and period inputs to create a PWM output as well as a count output. The IP generates an Interrupt when an invalid PWM range is written into block. The PWM was used to ...