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Path II Programmable

6 Posts authored by: cmelement14
Introduction Hardware Prepare PYNQ image SD Card Check if Your Webcam Works with PYNQ Connect to Ultra96 UART Connection Network Connection through USB Cable WiFi Connection Software Update PYNQ Download, Build and Install OpenCV 4.1.1 Update PYNQ Computer Vision Demo     Introduction  After I successfully completed all three P2P training courses (see my blogs here), this is the blog of my project - Facial Recognition. This proj ...
Introduction Lab 1 - A Couple of Lessons Learned Lab 2 - Redundant Constrain Files & Possible Missing Steps in Lab Instruction Lab 3 - Wifi Setup & Network/Internet Access Lab 4 - Remote Debug Linux Application Lab 5 - IoT Application Lab 6 - Discrepancies in Lab Instructions Conclusion     Introduction  The is the last part of my training before building my own project. It blogs all PetaLinux training labs (Lab 1 to Lab 6). The first lab g ...
cmelement14

Week #3

Posted by cmelement14 Nov 2, 2019
SW Lab 6 - Zynq UltraScale+ MPSoC Boot Process SW Lab 7 - The Release Version of Test_Peripheral Application Doesn't Work. SW Lab 8 - Import & Export SDK Workspace Content SW Lab 9 - LED Light Control SW Lab 10 - File System Library SW Lab 11 - Access SPI Device     SW Lab 6 - Zynq UltraScale+ MPSoC Boot Process  SW lab 6 & 7 are about the boot process for Zynq UltraScale+ MPSoC devices. It is the most complicated boot process I have encountered so ...
SW Lab 7 Problem Description A Correct SW Lab 7 Solution     SW Lab 7 Problem Description  Like other people reported here and there, I noticed the same problem in Experiment 2, SW Lab 7: the peripheral test application stuck at the point of showing message "Running Interrupt Test  for psu_csudma..." (shown in the screenshot below).   However, we did a similar peripheral test application in Experiment 3, SW Lab 5. The only difference between them is: in lab ...
cmelement14

Week #2

Posted by cmelement14 Oct 26, 2019
HW Lab 7 - Create Custom IP Lesson Learned - Case Sensitive Problem A Missing Field? Duplicated Lines Mystery Folder HW Lab 8 - Walk Around without Mezzanine Board Amazing Hardware Debugger & Built-in Logical Analyzer Missing Menu Item? HW Lab 9 - Incorrect Line Numbers Referred in Lab Instruction SW Lab 1 to 3 - Preparation SW Lab 4 - Explore Further - A Failed Memory Test Mismatch between Instruction and Screenshot Create an Extra Memory Test A ...
cmelement14

Week #1

Posted by cmelement14 Oct 19, 2019
Introduction Lab 0 - Pr-requisite Problem of Xilinx JTAG + Serial [0700] HW Lab 1 - Inconsistent Folder Format HW Lab 2 - Tip for Mapping I/O Pins HW Lab 3 - Probably Missing a Step HW Lab 6 - Slightly Different Conclusion Summary   Introduction  First of all, thank our sponsors Xilinx and  Avnet for offering this Path II Programmable training opportunity. Also thank rscasny for selecting me as one of the trainees. In general, the training ma ...