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Path II Programmable

12 Posts authored by: ralphjy Top Member
This will be the last in my series of Path II Programmable blogs.  The Path II Programmable training courses and project have been a great learning experience.  Although it's not without headaches and frustration, I'm really enjoying working with the the Xilinx MPSoC FPGA ecosystem and the Avnet Ultra96v2 hardware.  Doing a project really pulls together all that you've learned from the training but it unfortunately also exposes what you didn't learn or understand.  I apprecia ...
My project will involve routing a video stream through a neural network element and deriving detection, control and display outputs from the Ultra96v2, so I've been looking for examples that will help me learn how to accomplish this.  Unfortunately there are a lot of examples for the ZCU102 and the Ultra96v1 but it seems only a few specifically for the Ultra96v2.  I found a project on Hackster:  https://www.hackster.io/gaihrekrishna/dpu-trd-for-ultra96-22e426 which used the Ultra9 ...
The next element that I need to tackle for my embedded vision project is the creation of accelerated vision processing IP using Vivado HLS and the xfOpenCV function library.  That would allow me to create a component that I could include in my design.  There are a lot of examples of this but it was much harder to accomplish process than I expected.  I found a Hackster project that essentially demonstrated what I wanted to do Accelerating Image Processing with Ultra96  https:/ ...
Having completed the 3 Avnet Ultra96 courses in the Path II Programmable training, it's now time to move on to creating a project with what we have learned.  I know what I would like to do conceptually but I doubt that I can successfully implement it in the 5 week time frame we have for  the project.  Even though there are a wealth of examples in the Xilinx ecosystem, one thing I definitely learned from the courses are that there are huge issues with hardware and software version ...
Week 4 involved finishing up the PetaLinux labs and getting prepared for the post training project.   I received the Click Mezzanine Stater kit https://www.newark.com/avnet/aes-acc-u96-me-sk/aes-acc-u96-me-sk-rohs-compliant/dp/03AH7038?st=ultra96%20click%20mezzani… this week and was able to complete Labs 4-6.   The labs use the temperature sensor on LSM6DSL Click which is interfaced using SPI.  Below is the LSM6DSL Click on the Mezzanine board mounted on the Ultra96. &# ...
Week 3 marks my start of the PetaLinux course.  Before I did that I needed to move the Xilinx development environment to another more powerful computer.  I now consider it somewhat of a miracle that I was able to get through the HW and SW courses using an i3 computer with 8GB of memory.  I moved the setup (VM and XIlinx tools) to a new i7 with 16GB of memory.  Setting up the VM for a second time went quickly and this time I installed Ubuntu 16.04.4 to insure that I was compat ...
ralphjy

P2P: WiFi Driver issue

Posted by ralphjy Top Member Nov 2, 2019
I ran into a problem when I was first doing the Ultra96 hardware quickstart where I could not reliably connect my iPad to the Ultra96 WiFi access point.  At that time I just bypassed it by configuring as a WiFi client.   Now I have that same problem when going through the PetaLinux labs and decided to look into it.  It turns out that the 2018.3 BSP that I am using has the incorrect WPA driver specified.  Apparently this is an issue that others have encountered before: Can't ...
Continuing my week2 post......  this will cover the SW introductory course   The objectives for the introductory Software course are: Introduce developers to Xilinx SDK (Software Development Kit) Demonstrate SDK capabilities Connect SDK to hardware for execution and debug Utilize a peripheral interrupt to show real-time software response Show a basic example of how to use an external sensor module   This diagram shows the handoff of the hardware design from Vivado to the SD ...
I saw that hackster.io is offering the Avnet Ultra96 Technical Training Courses as a bundle for a reduced price.  This includes the 3 introductory courses that are used for Path II Programmable plus 3 advanced courses.  Of course, you need to bring your own hardware, but I thought this might be of interest for people following this training.   https://www.hackster.io/workshops/ultra96 ...
This week has been more productive than the last since much of the first week was spent configuring the development infrastructure.  I have completed the 10 HW videos (lectures) and the 9 HW labs and the 12 SW videos and 11 SW labs.  I use the term "completed" somewhat loosely because a couple of the labs (HW 8 and SW 11) use the mezzanine board kit which we did not receive so I went through all the steps but could not verify the results on the hardware other than through the debugger. ...
I was amazed at the huge amount of lesson material associated with Path II Programmable.  I ended up with around 10GB in 18 zip archives.  As I mentioned in my earlier blog, the training program is a combination of 3 Avnet Ultra96 courses.  With all this material it would have been nice to have an overview document that provided a roadmap of how to navigate the course and a list of all the course material.  To be fair, the documentation is very good and it just takes some stu ...
ralphjy

The Challenge Begins

Posted by ralphjy Top Member Oct 14, 2019
Wow.  I've been looking through the course material and it is quite comprehensive.  It's actually 3 Avnet courses combined into a one training package.   Developing Zynq MPSoC Hardware (10 lectures, 9 labs) Developing Zynq MPSoC Software (12 lectures, 11 labs) Integrating Sensors on Ultra96 with PetaLinux (7 lectures, 6 labs)   Quite a lot of material to cover in a month.  Looking forward to the challenge and a lot of learning .   HW Agenda   SW Agenda &# ...