Skip navigation
Introduction Lab0 Lab1 Lab2   Introduction  As I had already mentioned in my application I have worked with FPGAs in the past for 2 years roughly including my masters thesis with the old Xilinx ISE. So I kind of have a basic sense of how FPGAs work and the background behind them. At the time I had also worked with Microblaze which was quite a sensation when the idea of soft-processor was amazing. It has become quite main-stream in the FPGAs today though. So one can say ...
Overview :   This lab is similar to the previous lab, we configured some additional peripherals, export to the SDK, and exercise the newly created peripherals.       Notice in the above diagram, there are checks next to UART 1, GPIO, SD 1, USB 0,  and QUAD SPI. One of the important lessons they wanted us to learn in this lab was why the order in which you map peripherals matters. The devices are listed in priority in the green boxes above, with the memory devices ha ...