Introduction

 

Path to Programmable is a training course for Programmable SoCs, like the the Xilinx Zynq-7000 All Programmable SoC.

As many others have pointed out, this isn't a typical FPGA/HDL course, since the training material focuses less on the digital design/FPGA aspect, but is more about using Xilinx tools (like IP based design etc) - many of which will be relevant for other non-SoC FPGAs in the Xilinx portfolio and some might apply only to Zynq (PS-PL interconnects etc.).

In line with the Path to Programmable: Course Syllabus, the training material for Module 1 consists of 11 training videos (which are 5 - 10 minutes long) & 10 Labs (which are PDFs).

 

Avnet/Zedboard.org have a collection of tutorials over here: Training and Videos | Zedboard

I haven't yet gone through all the files that Randall sent me, but they seem similar to what's hosted on the site:

Developing Zynq Hardware (Vivado 2017.1 and 2017.4) - Module 1 & Developing Zynq Software (Vivado 2017.1 and 2017.4) - Module 2

 

Other notable resources are The Zynq Book (and the tutorials) and the MicroZed Chronicles by Adam Taylor (at hackster.io and his site), in addition to many videos on Youtube.

 

HW Chapter 1: Zynq Overview

 

The introductory video started off with an overview of the course. This was followed by the advantages of parallel processing (vs sequential) and the Xilinx Zynq, which combines ARM processors (PS - Programmable System) with FPGA fabric (PL - Programmable Logic). The aim is accelerate sequential tasks which typically run on a processor (eg C code) by shifting them to hardware (HDL). All designs typically need something to control the parallel hardware blocks, so instead of using a softcore (which uses fabric), an ARM Cortex A9 is interconnected with the FPGA fabric.

This also comes with the benefit of lower power (versus a discrete microprocessor + DSP + FPGA) and security, since there is no easy way of snooping the interconnection between the PS & PL. Xilinx also claims that from the development perspective, the software is independent from the hardware as software & hardware engineers can work on the PS & PL independently in parallel. The software ecosystem is rich, with support for multiple middleware/stacks, operating systems & hyerpvisors.

 

The Zynq-7000 family scales over a vast range: from a single core ARM with a Artix-7 series equivalent PL to a dual core ARM with Kintex-7 equivalent fabric. Xilinx has also introduced Zynq UltraScale+ (which packs upto quad core ARM Cortex A53s, Dual Cortex R5s, a GPU & video codec - like the part used in the Ultra96 Zedboard) & Zynq RFSoC.

 

The MiniZed board that Path to Programmable trainees are using is the smallest Zynq - the Z-7007S which has a single core ARM Cortex A9 & 23K Logic Cells (equivalent to a XC7S25 or XC7A25T)). Being a low-end part, the Z-7007S doesn't include any Gigabit Transceivers or PCIe interface.

 

Lab 0 - Pre-Lab - Setting Up a Development Platform for Zynq

 

This was basically a setup guide to get all the required tools installed - Vivado Design Suite, 7-zip (for decompressing archives), a serial terminal & a PDF reader.

Although the installation process is simple, the instructions were detailed, contained screenshots and very specific instructions.

 

Meet the MiniZed

 

The MiniZed is the smallest sibling of the ZedBoard. Roughly the size of a BeagleBone Black/Raspberry Pi, it has a Xilinx Z-7007S (single core Cortex A9 & 23K Logic Cells of PL), 512MB of DDR3L SDRAM, 128Mb QSPI Flash, 8GB of eMMC & a WiFi/BT 4.1 module. It also includes an Arduino compatible shield interface, 2 PMOD ports, 2 bi-element user LEDs, pushbuttons, a switch, a motion & temperature sensor and digital microphone.

It connects to a PC over microUSB, which handles power & data and there is an auxillary microUSB port for power. The onboard FTDI chip handles programming, JTAG & serial pass-through.

 

 

{gallery} MiniZed Unboxing

 

The box contained the MiniZed, micro USB cable, a safety guide, quick start leaflet and Vivado Design Suite Voucher.

 

The top side of the board hosts almost everything - the Zynq, RAM, Flash, eMMC, sensors, USB connectors, button, WiFi/BT chip, antenna etc. The bottom side doesn't have much, but it is raised by rubber feet so that the components on the underside of the PCB don't touch the flat surface that it's placed on.

 

I followed the instructions in the Quick Start Guide, which involved plugging in the board, opening a serial terminal to connect to the UART, logging in to Linux and running the two include examples - a Bluetooth device scan and a demonstration that uses the motion sensor, temperature sensor, microphone & LEDs.

I downloaded the board support files - definition files that load the board presets into Vivado (the part, board peripherals, connections etc) and the constraints (.xdc) file, which is used to map the I/O pins on the chip to HDL pins/ports in Vivado.

 

Progress:

HW Chapter 1 video: Zynq Overview

Lab 0 - Pre-Lab - Setting Up a Development Platform for Zynq

 

Next up:

HW Chapter 2 video: Xilinx Embedded Tool Flow

Lab 1 - Building a Basic Zynq Design