First Stage Boot Loader application configures the FPGA with HW bit stream and loads operating system image or standalone image or second stage boot loader image from non-volatile memory (NAND/NOR/QSPI) to RAM and starts executing it. In this lab we will learn how to generate a FSBL application using template.

 

1. Generate the FSBL

In SDK please choose Files -> New -> Application Project. Provide name and choose option to create a new BSP.

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From templates please select a Zynq FSBL:

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Then press Finish. In case of preparing FSBL for production we could choose Release configuration from project properties available from Manage Configuration options menu.

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The basic flow of FSBL is following:

- initializes MIO, PLLs, clocks, DDR and peripherals,

- based on boot mode it jumps with boot process to selected boot media: QSPI, NAND, NOR, SD or JTAG.