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Path to Programmable

7 Posts authored by: mu.udhay
Hi Friends , in the Previous post we have Created our own Custom PWM IP in Vivado and just Integrated it in our Design. In this Post we will run it On Minized Board. In the Next Post , I will show the Debugging Routes we will trace : For these functionalities we have added Integrated Logic Analyzer Core and JTAG to AXI master cores in our Block Design , I will Clear how these work in the Next post.   After Creating the Block Design with Our Custom IP added in Design this is no new Task ...
In this Post , we will get helpful insights about an IP (Intellectual Property) , How we can create our Own , How we can Integrate it in Our Design using powerful  Xilinx Vivado tools. For Some Motivation about IP just see the below diagram of the Design I implemented in Vivado for working on PWM in Minized: As you can see , the Above Design consists of various blocks Such as "ZYNQ_7 Processing System" Block,"AXI Interconnect "Block,"PWM_w_int" block etc.. All these blocks are simply the ...
Hello Everyone, My peers in Path to Programable have Done Great work in giving step by step procedure to implement DMA transfer so Why Reinvent the Wheel , I take a different approach. I will try to present a vivid picture regarding Why we need to implement few IPs to achieve DMA transfer between BRAM and DDR instead of using PS and How? First As always we take Bottom Up approach , Fasten your Seat Belts !   What is DMA ? DMA refers to Direct Memory Access , which in short is used to re ...
Hello Folks !   We are now in the funniest part ! Believe me Guys , i gone through the basics of the tcl at first this week , studying how it works and what are possible pitfalls and various others along with why it is used in Vivado , how it is implemented in Vivado.   In this post i would like to give better insights regarding tcl and vivado tcl (Yeah , there is a voltage difference between the two )   Firstly the TCL (but i remember the TICK show)   Most of you guys a ...
HI guys ! This post is mainly Intended to Answer few Important Questions regarding why we are doing few things for Getting your Project Runing on Minized at First. Here are the List of Questions this Post aims to Clarify,If you got few other Questions as well, Feel free to ask,I will make sure to give vivid picture regarding it. NOTE : These Questions are actually created by guessing possible doubts users would encounter regarding my Previous post of "Hello World with Minized".   Quest ...
mu.udhay

Hello World with Minized

Posted by mu.udhay Oct 28, 2018
First of All , Sorry for long Pause Guys ! I missed you So much I would Make sure to Pace up with the Rest ASAP.   Installing Xilinx Vivado in Linux:   First of All , Get Ready with Required Tools: Xilinx Vivado(2017.4 or Later version only) , EDK , Drivers(for Windows) , Putty or Tera Term   Note: XIlinx Vivado support only for 64 bit Architecture, So check for it before getting Started.   For Linux folks , I made my First Video on how to install it .     ...
Hi Guys this is my first Post ,My Board is about to come, may be within 24 hrs ,My Peers have already shared their Nice Experiance with it , So inorder to prevent Redundency I would like to give a brief Overview regarding the Purpose of the Board , How it's Architecture would be , What you can do with it   First of All What is Minized PSoC ? Minized is Xilinx Zynq XC7Z007S based Programmable SoC (System on Chip) , which has a  Processor Subsystem (PS) of ARM Cortex A9 core and the ...