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Path to Programmable

3 Posts authored by: nixiefairy
Hey everyone,   ZynqHW_2017_lab_3_v13.pdf   In lab 3 we will start discussing the other Zynq blocks in detail. The lab starts with introducing the selection of boot device. The QSPI memory interface (Quad Serial Peripheral Interface) is a SPI (another asynchronous serial communication protocol) module which has a memory mapped register interface, which allows direct interface for accessing data from external SPI devices and thus simplifying software requirements. The bootup of the QS ...
Hey guys, Hope this new year brings luck and fortune to everyone!   ZynqHW_2017_4_lab_1_v11 :   So I would just cover briefly Lab 1 : Guides to setup a new project. I didn't like the fact Avnet is forcing it's users to select target language as VHDL. Would have been great if they could leave the decision up to the reader. So ignoring this particular instruction , I went ahead with Verilog.       2. After selecting the correct target device, a new Zynq project ...
nixiefairy

00-And so it begins..

Posted by nixiefairy Dec 29, 2018
Hey guys, So I received the MiniZed about four weeks back . It arrived during my final year exams which gave me no time to mess around with the board and the training material. Finally after my exams got over and a few celebrations (:P) I am ending off 2018 with this blog series. Before we dive into the material composition, I thought it might be best I introduced myself to the community : I am a fourth year undergrad currently studying Electronics and Computers Engineering. My experience with ...