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Path to Programmable

17 Posts authored by: snidhi
The Module 2 of the MiniZed Path to Programmable is focused on software development in xilinx fpga. The previous minized SW development ZYNQ blog can be read here The Hardware related blogs are here Summary of Module 1 Path to Programmable ZYNQ HW blogs The Software related blogs are here Summary of Module 2 Path to Programmable ZYNQ SW blogs   ZYNQ SW Module Lab 10  In this lab, an application which reads and writes MAC address (EUI-48 only) configuration data to/from the on-board Q ...
The Module 2 of the MiniZed Path to Programmable is focused on software development in xilinx fpga. The previous minized SW development ZYNQ blog can be read here The Hardware related blogs are here Summary of Module 1 Path to Programmable ZYNQ HW blogs The Software related blogs are here Summary of Module 2 Path to Programmable ZYNQ SW blogs   ZYNQ SW Module Lab 8  Aim: Develop ZYNQ software with SDK Project Management. This shows the basics such as how to share or archive a collec ...
The Module 2 of the MiniZed Path to Programmable is focused on software development in xilinx fpga. The previous minized SW development ZYNQ blog can be read here ZYNQ-SW Module 2 Minized Blog3 --lab4 & lab5 The Hardware related blogs are here Summary of Module 1 Path to Programmable ZYNQ HW blogs The Software related blogs are here Summary of Module 2 Path to Programmable ZYNQ SW blogs   ZYNQ SW Module Lab 6 ZYNQ SW Module Lab 7 Conclusion   ZYNQ SW Module Lab 6 ...
The list of the step by step zynq software development blog learnings and projects are as below     Topics in the minized ZYNQ software development Link to the minized software development blogs Introduction to zynq SW development and Vivado SDK Application development ZYNQ-SW Module 2 Minized Blog1  -- Labs 0 1 2 Developing Zynq software with Xilinx SDK using standalone Board Support Packages BSPs. ZYNQ-SW Module 2 Minized Blog2 -- Lab 3 SW applications for the Hardware platform ...
The Module 2 of the MiniZed Path to Programmable is focused on software development in xilinx fpga. The previous minized SW development ZYNQ blog can be read here ZYNQ-SW Module 2 Minized Blog2 -- Lab 3 The Hardware related blogs are here Summary of Module 1 Path to Programmable ZYNQ HW blogs The Software related blogs are here Summary of Module 2 Path to Programmable ZYNQ SW blogs   ZYNQ SW Module Lab 4 SW Module Lab 4 Experiment 1 SW Module Lab 4 Experiment 2: Peripheral Te ...
The Module 2 of the MiniZed Path to Programmable is focused on software development in xilinx fpga. The previous minized SW development ZYNQ blog can be read here ZYNQ-SW Module 2 Minized Blog1  -- Labs 0 1 2 The Hardware related blogs are here Summary of Module 1 Path to Programmable ZYNQ HW blogs The Software related blogs are here Summary of Module 2 Path to Programmable ZYNQ SW blogs   ZYNQ SW Module Lab 3  This lab is about developing Zynq software with Xilinx SDK using ...
The Module 2 of the MiniZed Path to Programmable is focused on software development in xilinx fpga. After viewing the training videos; this module is about Vivado SDK and SDK Application development flow. The previous minized hardware development ZYNQ blogs can be read here Summary of Module 1 Path to Programmable ZYNQ HW blogs The Software related blogs are here Summary of Module 2 Path to Programmable ZYNQ SW blogs   After generating the zynq HW the board support packages from the HW p ...
The list of the step by step zynq hardware development blog learnings and projects are as below   Topics in the Minized Zynq Hardware Development Link to the Zynq Minized Hardware development Blog Day 0 - MiniZed ZYNQ Day 0 - MiniZed ZYNQ FPGA Arrives Minized FPGA Board Concept and Basics Week 1: MiniZed ZYNQ Concept and basics Lab 0 Lab 1 and Lab 2 Setup Xilinx Vivado Week 2: Done!! Lab 0 Lab1 and Lab2 Lab 3 Lab 4 Lab 5 Peripheral Tests and Memory Tests Week 3: Done!! Lab3 Lab4 and Lab5 ...
All my previous blogs can be read in detail here Path to Programmable This blog is further continued from Week 5: Done!! Lab 8 A good read of the previous blog 8 is necessary to understand this Lab 9 as they are related in the project context.   Aim of the Lab 9 Blog Finish Hardware Build using Tcl Look into the .xdc file Power Utilization of the project Final Device and Schematics Conclusion   Aim of the Lab 9 Blog  In lab 9 we explore the benefits of ...
All my previous blogs can be read in detail here Path to Programmable  This blog is further continued from Week 4: Done!! Lab 7 A good read of the previous blog 7 is necessary to understand this Lab 8 as they are related in the project context.   Lab 8 Overview and Objectives Experiment 1: Testing the software that handles PL-generated interrupts and utilizes an Interrupt Service Routine The Test Results for LED dimmer control at PL LED via software in SDK Experiment 2: ...
snidhi

Week 4: Done!! Lab 7

Posted by snidhi Nov 20, 2018
All my previous blogs can be read in detail here Path to Programmable   This lab was very special and interesting. It involved creating a custom ip block (partly in VHDL and partly in GUI) and adding it to the existing previous vivado design with the BRAM memory. In this lab we actually did some VHDL programming. In this lab one can see that the ip creation in VHDL itself is quite some work and understanding of the input; output signals in the ip block is necessary.   Lab 7 Overvie ...
In the previous weeks I finished the lab 6 and lab 7 together.   Lab 6 Theme & Main Objectives Testing Lab 6 with the serial port Conclusion   In lab 6 I learned how to establish the data flow between the programmable logic PL and processing system PS using the PS DMA. The PS DMA controller improves data transfer between PS and PL. This lab 6 is pretty easy to be done and continues from lab 5.   Lab 6 Theme & Main Objectives  In the last lab 5, PL-bas ...
Out of curiosity, I decided this weekend to spend some time to measure the heat distribution on the Minized FPGA board and compare it to another fpga board. For this measurement I used the FLIR ThermoVision A20M 60Hz 160 x 120 Infrared Thermal Imaging Camera IR Imager. It was a fun experiment to do. Datasheet of the ThermoVision A20M   Introduction to ThermoVision A20M The Test Setup The Results of the Thermal Imaging Test Conclusion   Introduction to ThermoVision A2 ...
In this week; I also completed Lab 3, Lab 4 and Lab 5. The objectives of these labs were also very well written and rather simple to follow. These labs are a continuation from previous labs which can be found here   Lab 3 Lab 4 Lab 5 Conclusion   Lab 3  Main Objectives of this blog • Enable and map all default peripherals in IP Integrator • Set the PS clocks for the PS peripherals and the PL • Create and Run C programs Peripheral Tests ...
Introduction Lab0 Lab1 Lab2   Introduction  As I had already mentioned in my application I have worked with FPGAs in the past for 2 years roughly including my masters thesis with the old Xilinx ISE. So I kind of have a basic sense of how FPGAs work and the background behind them. At the time I had also worked with Microblaze which was quite a sensation when the idea of soft-processor was amazing. It has become quite main-stream in the FPGAs today though. So one can say ...