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I am aware that the HS connector uses 1.2V logic but is there a way to bodge it to operate with 1.8V logic? I notice the VCCO_HP rail is powered by a TPS6508641 (LDO03A) which can be programmed to 1.5 volt then look... Hello, I'm using an UltraZed IO Carrier Card. I have used my custom Petalinux with no problems. But since yesterday, I don't know why, it doesn't boot from the SD Card. Also I have tried with the UltraZed IO C... Hi, In the hardware user guide here: http://zedboard.org/sites/default/files/documentations/UG-AES-ZU7EV-SOM-G-V1.pdf I read that DDR4 RAM can do 2400 Mbps (mega bits/sec) transfer speed. Is th... Hi I am using the Xilinx petalinux tool version 2019.1 to build the images for booting up the Ultrazed EV starter Kit. I have downloadedUltraZed-EV Carrier Card—PetaLinux 2019.1 Enhanced BSP file from t... Hi, I read the post (UltraZED-EV + IO Carrier Card VCU Design Example (v2018.3)) by Jason Moss about his test on the ZynqUS+ VCU. It seems the highest resolution he tested was 1080P30.... We have the UltraZed eval board (EG) and have Xilinx 2017.4 u-boot/kernel with Ubuntu 18.04 running. USB 3 seems to be setup correctly - all USB 3 devices we've tried are recognized as USB 3. We are connec... Hello, I downloaded UltraZed-EG IO Carrier Card - PetaLinux 2019.2 Enhanced BSP file for petalinux 2019.2 but it is not working, I can't create a project with this file. I got following error when creat... Hi, I have a Vivado design based on UltraZed-EV SOM. I am using Vitis 2019.2 to develop an application that makes use of a lwip TCP server. It happens that if I launch the application by selecting the psu_init.tcl fil... Hi, We are designing a custom carrier card for the UZEV and we have a problem with the USB interface with the USB_OTG_CPEN pin always held low. We want to use it as a host and we have the following setup: ... I've been using an UltraZed EV board for software development, using the Xilinx toolchain for months, without many problems. This week, I can no longer detect any devices under the JTAG chain. I've tried several diff... Hello, Running the make build script from the Avnet/Vitis repository is causing some problems. My machine is a Ubuntu 18.04.1 LTS VM. I have the latest and greatest toolchain versions 2019.2 (Vitis,Vivado and... Hi, I am trying to enable the SFP+ interface 1 by connecting it by RJ45 to SFP+ converter and run the XIlinx echo server on it. In my Vivado design, I used the AXI 1G/2.5G Ethernet subsystem with the GT reference c... Hello! I have the UltraZed-EV System-on-Module Starter Kit. I have the petalinux-2019.1 and UltraZed-EV Carrier Card—PetaLinux 2019.1 Enhanced BSP. I created a project and checked that the root ... I’m trying to get a USB 3 device working on the UltraZed I/O Carrier Card with an UltraZed-3EG SoM. The device is usually detected, but only as a USB 2 full-speed device. The USB drive I’m using for testin... We bought two Ultrazed 7EV SOM+Carrier Card starter kits. I cannot get the display port to work with the shipped SDCARD as is, and looking for some help. I followed the avnet 7ev cc test document and display p... Hello, I wonder if someone has done a pipeline from HDMI in and Displayport out on the Ultrazed? No VCU, yet. The Avnet 2018.3 Example Design used ZCU106 TRD but stripped out hdmi as an example. What's... Hi. I have an Ultrazed EG starter kit which fails on boot with this serial output: Avnet modifying SDHCI0 and SDHCI1 registers for UltraZed SOM SERDES initialization timed out XFSBL_PSU_INIT_FAILED =======... Hello, I'm designing my own custom carrier board to support the UltraZed SOM and I planned to use the same IDT clock generator used on your IOCC carrier board. The reference indicated in the BOM is 5P49V5935B521LTGI... Hello, I was wondering if any offical board support for the PYNQ envirnonment -like for the ZCU104- is planned or underway. With kind regards, Kris Hi experts, I'd like to know where I can find the BSP for UltraZed-EV for using with Petalinux-2019.2, please? Thanks in advance, Khang