Analog-to-digital converters (ADCs) enable a wide range of electronics applications. They make it possible for devices to interact with their environment. Most sensors convert a physical quantity into a voltage. While it is certainly possible to build circuits that make use of that analog value, very often it is necessary to work with that voltage digitally. As the name implies, an ADC converts analog signals into a digital format. For example, if you put 5 volts into an analog-to-digital converter, you might get out a value of 0101, which is binary for 5. Real ADCs are not quite that coarse, of course. While there are many analog-to-digital methods available, the two most popular types are successive approximation register (SAR) and delta-sigma. To explain how those two work, first, we need to look at a straightforward architecture.
(To be clear, a flash ADC has nothing to do with flash memory.)
You can think of this method like a liquid thermometer. As the temperature goes up, the liquid inside rises to indicate the measured temperature. A flash converter does the same thing with a series of comparators connected to a voltage divider network. The voltage divider steps down a reference voltage by 2N. Each comparator represents one bit of resolution and compares the incoming signal to the divided values. One side of the chain is the maximum reference voltage, and the other is the minimum. The higher the voltage of the signal, the more comparators output a digital 1. A decoder is necessary to turn the highest "on-value" into a binary code.
The flash converter's primary benefit is that changing the bit resolution does not impact conversion time. Since the comparators simultaneously see the reference voltages and the signal under test, their sampling time, or aperture, is small. It is difficult to achieve more than 8-bit resolution because of how well each comparator stage needs to match the other stages. Additionally, because each stage needs a precision resistor, a flash converter tends to be relatively large when implemented in an IC.
So, flash converters are well suited for high bandwidth applications where power consumption is not a concern. They excel at gigasample-per-second applications. These converters are excellent for waveform capture. Common applications are wide-band RF and test equipment.
The successive approximation register (SAR) method is the most popular architecture. It provides a balance between sampling rate, accuracy, and power consumption. Most (or all?) microcontrollers with an ADC are using a SAR style converter. Their application, or usage, is slightly more complicated than a flash converter. In addition to the input analog voltage and output binary code, there are two digital control signals. An input signal tells the converter to start conversion, and an output signal from the converter indicates when the conversion finishes.
The way they work internally looks more complicated than a flash converter but they are related. A SAR contains, ironically, a digital-to-analog converter (DAC.) A circuit called the successive approximation register (SAR) generates digital codes that the DAC converts to an analog voltage. A comparator compares that voltage to the input signal. The approximation register uses this comparator output and the history of bits used by the DAC to approximate the input voltage. This process takes several steps while the SAR "walks" through the tree. Because the conversion takes time, sometimes there is a sample-and-hold capacitor that takes a snapshot of the signal before conversation starts.
This method is why the SAR converter is slower than a flash converter. With only 1 comparator stage the SAR sequences the through multiple values to simulate the multiple stages of the flash converter. The size, and therefore cost, of an 8-bit SAR is much smaller than a flash. Additionally, adding more bits is somewhat linear with a SAR. This flexibility is why you see 12-, 14-, and 16-bit SAR ADCs.
SARs typically sample in the hundreds of megasamples-per-second range. Being the most popular architecture, they also tend to be the least expensive for a given sample rate and bit-width.
There are many applications for a SAR. It is difficult to suggest "typical" applications. After all, they are a general-purpose ADC. If the sample rate or bit width isn't enough, that is when you look at other architectures.
Higher bit-resolution is the primary advantage offered by delta-sigma. (Or you might see them called sigma-delta.) If a converter has 18- to 24-bit resolution, it is likely a delta-sigma design. The higher resolution does come at a design cost. When compared to SARs, delta-sigma converters are slightly more challenging to use. Of the three architectures discussed in the post, the delta-sigma is probably the least understood. It has a very different architecture from the other two types. At its core is a 1-bit ADC. (That is not a typo.) The rest of the ADC is digital. Here is a high-level block diagram of the delta-sigma converter.
The 1-bit ADC is part of the modulator block. That block's purpose is to take the input analog signal and convert it into a train of digital pulses. For this converter to work, this sampling rate needs to be significantly faster than the frequency content of the incoming signal, which is known as oversampling.
Once converted into this pulse coded modulation (PCM) train, a digital filter is applied. Typically this filter is a form of averaging known as a sinc filter. (Although other filter types exist for different applications.) Next, the data goes through a decimation stage, which reduces the digital content to the minimum necessary to represent the original signal. One benefit of this approach is that any high-frequency noise introduced by the modulator stage gets thrown away.
In terms of size, a delta-sigma has very few analog (resistor) components. So they do not take up much silicon space. That size does not translate directly to cost since they are not as common as SARs. However, SAR and sigma-delta are rarely in competition with each other.
Delta-sigma converters have very high resolution, up to 24-bits, but do not offer much bandwidth. The low noise and high bit count of a delta-sigma converter make it ideal for applications like a Wheatstone bridge-based measurement or thermocouples. The signals in both examples have low bandwidth, and the precision matters more than the sample rate.
These descriptions are very high-level overviews of flash, SAR, and sigma-delta converters. Component manufacturers offer a variety of application notes which goes into significantly more detail about how the converters work and what to consider for different applications. Far more than I can cover in this post. In the references section below, I point to a few resources I used to pull this information together. The TI application notes on the delta-sigma are excellent references for the details of how these converters work.
|ADC Architecture||Resolution||Sample Rate||Power||Cost||Example|
|SAR||8- to 16-Bit||Mid to High||Medium||Low to Mid|
|Delta-Sigma||up to 32-Bit||Low||Low||Low to Mid|
Last, how do you decide which one to use? Like all things in engineering, no ADC architecture is the best choice for every situation. Flash converters offer high sample rates, but limited bit resolution. SARs balance sample rate, resolution, and cost. Both are relatively easy to implement in a design. For low power or ultra high resolution, the delta-sigma offers an alternative.
What are some applications you have used these types of converters for in your designs? Let me know in the comments.
- SAR ADCs vs Delta-Sigma ADCs: Different architectures for different applications. TI / element14 Webinar.
- How delta-sigma ADCs work, Part 1. Bonnie Baker, Texas Instruments. (slyt423a)
- How delta-sigma ADCs work, Part 2. Bonnie Backer, Texas Instruments. (slyt438)
- Understanding Flash ADCs. Maxim Integrated. (Tutorial 810)