This is a brief review of WEBENCH(r) Designer applied to the design of an FPGA power supply. I'm doing it in response to this page that Randall posted:

 

Seeking 1 More Person to Review TI's WEBENCH Power Architect Tool Who Will Receive Fundamentals of Power Supply Design Book FREE

 

I'm not an 'official' reviewer, instead I've just lauched in and done a review.

 

I reached the design tool from this page on the Farnell website by pressing the Webench button:

 

XC3S50A-4VQG100C XILINX, FPGA, Spartan-3A, DLL | Farnell UK

 

It chunters off to the TI website with the part type filled in and a note of the distributor.

 

Here's what you see if you have FLASH disabled (it's so long since I actually needed Flash for a website that I didn't even know that it

was disabled on this particular machine I'm doing the review on). I don't want to enable it in IE11, so at this point I'll swap to Chrome

where it can be enabled on a website-by-website basis.

 

 

After about 15 seconds and some fairly meaningless messages, the My Designs/Projects screen has been built and is ready to use. It is on

the 'Configure FPGA Loads' step - the first one after creating a new project. Unfortunately, though it managed to select Xilinx, the part

number selected is XC3S1400A (the first one on the list). I selected the XC3S50A part.

 

 

 

On the same page is a box marked 'Select loads to Add'. This includes the I/O bank VCC voltages, which by default are all set to 1.2V.

That seems like a rather strange choice for an older part like this. I would have thought a default of 3.3V or 2.5V would be more

reasonable. The voltages can be changed, but the values are limited to 1.2V, 1.5V, 1.8V, 2.5V, 3.3V, so you are out of luck if you want

3.0V. We can see that the FPGA tool has been adapted from something else with the message above this box which reads "Consult the

processor datasheet...". I changed all the I/O voltages to 3.3V for the imaginary design I'm doing for the purposes of this review and

then hit the 'Next Step: Add Loads' button.

 

The next screen is entitled 'Add Loads', but then starts with configuring the power sources. For some reason the range is defaulting to 14V-

22V. For a small FPGA like this, with very modest power requirements and which would probably form part of quite a simple system, I would have thought

allowing a selection from a few common PSU voltages might be more useful, though it's easy enough to change. For my imaginary design, I'm

going to have one source and set it to a range of 10V to 14V (a very poor 12V PSU with very wide tolerance).

 

 

Next, on the same page, is Loads again, this time with more information required. There is a soft-start time ticked and filled

in, but is that recommended? It's not clear at all. There are also maximum currents filled in, but again no idea whether that's a

suggestion or just to have at least something in the box. It's very unclear at this stage just how much the tool is helping us to design

a FPGA power system and how much we're supposed to be doing it ourselves. Since I've got no idea what I should be doing with this, I'm just

going to click on 'Submit Project Requirements' (which looks like the only thing you can use to move on) and see what happens.

 

After a few seconds it has generated a design.

 

 

It's a bit of an odd design, with three of the I/O banks being supplied by one device and another device for the fourth bank.

 

You can sort of see how it got there, based on available devices and maximum currents, but it's not

how a human would design it (at least, not the particular human who is writing the review) - to be fair, what's thrown it a bit is my

giving it a 12V PSU as the source. The next step for a real design would be to consider the currents better and 'nudge' the design tool

into making the design that you'd want.

 

Next page is View/Edit. This allows each converter in the design to be examined and alternative choices made based on cost and efficiency,

etc.

 

 

Next page would have been the actual schematics and BOM, except that first it wanted me to sign-in. I left it at that point as it was

just a fantasy design for review purposes.

 

 

Whilst it has some merit and could be a useful tool in the hands of someone who has previously designed systems like this, it certainly isn't

an automated way to replace design - it needs to be guided and the decisions it makes considered carefully before being accepted.

So a qualified thumbs-up.

 

It could do with more explanation, as you proceed, as to what you are meant to be doing. Are the defaults actual recommendations or just

random placeholders, and that kind of thing. And it could benefit from understanding more about FPGAs.