1.     Background

Back in May 2018 rscasny asked for volunteers to test out Texas Instruments' (TI) WEBENCH FPGA Power Architect tool that had been embedded into the applicable component webpages for Newark and Farnell. The FPGA Power Architect tool is an online design application for Field Programmable Gate Array ( FPGA) power supplies, that, by the very nature of their range of load requirements, at different voltages, can be quite complex. I missed the first call for this test but noticed there was a later call for another tester; I didn't know much about FPGA power supply design, but there was a fantastic Power Supply Design book by Robert Mammano being offered in return....I put in my honest bid to help (e.g.an enthusiastic FPGA novice).


About a week ago Randall asked if I could still do this test, so here goes with my findings.


2.     "I Don't Design FPGA Power Supplies"

If you are saying to yourself "But I don't design FPGA power supplys" then please don't stop reading at this point, as I think you might be surprised by what else WEBENCH can offer.


3.     What Is WEBENCH FPGA Power Architect?

WEBENCH FPGA Power Architect is a part of the more comprehensive WEBENCH Designer (discussed later on ) and is a useful and free online tool provided by TI for designing the external power supplies required by FPGA devices. Many modern FPGA have pin counts running into several hundreds and, I believe to help balance out internal currents as well as allowing certain features to operate faster (by using lower voltages), there is a multitude of different voltage pins for each device (unlike the old fashioned 74LSxx series of logic with their single supply rail). Normally design engineers would have to consider the power supply design whilst also working on the FPGA design and a small change in the latter could require a redesign of the former. The designers may also have tight constraints on budget, board size, power dissipation or a combination of those demands. The whole task could be quite time consuming which in part goes against the reactive and flexible product designs that FPGA lend themselves to. It seems however that TI soon realised this and so brought out this design tool to assist the engineers.


The WEBENCH and WEBENCH FPGA Power Architect can be accessed directly via the TI website, but Newark/Farnell have taken this one step further and integrated the tool into their webpages for appropriate products. When an engineer browses the FPGA selection on the Newark/Farnell website they will see the WEBENCH icon for applicable products - currently these include many of the Xilinx, Altera and Actel FPGAs.


No account is required with TI, although an account does seem to be required at the very end of the design process (if you wish to save the designs for incorporation into other tools).


4.     Initial Run Through - setup & test design

My approach to the task was quite simple; start using it. I planned to explore each step, page and the options available to see if I understood them. Once I had been through the whole cycle I would then try out some more realistic designs.


Initially I had a bit of a running dialogue with Randall as I could not see the WEBENCH icon on my web browser. I switched from my Linux box+Firefox to Windows10+Firefox. I made sure Flash Player was installed and active. Randall sent me some other product links but I still couldn't see any link to the WEBENCH from those Farnell pages. Finally I switched to Google Chrome browser and then the icon appeared (as shown below in the first gallery photo).

{gallery} Preliminary Setup

The Farnell website as viewed from Google Chrome showing the WEBENCH icon

Viewing from Google Chrome shows the WEBENCH icon that links to the TI WEBENCH FPGA Power Architect Tool.

WEBENCH loading via the Flash Player
WEBENCH is loading via the Flash Player software.


The gallery below shows my initial walk through of the WEBENCH tool. I was just testing out the options and not putting in realistic data. Towards the end I was required to log in to TI website and in that process I managed to reset my deisgn - therefore my test design changes significantly towards the end of the design flow, but that should not detract from my actual comments.

{gallery} Initial Walk Through

Selecting the FPGA that is loading this Power Supply.

Stage 0: From the top bar we can see that we are at Stage 0. From here we can select the main FPGA device that this power supply is getting loaded from. Selecting a device will repopulate the summary box so the user can confirm the device specification. In the bottom right is a list of all the main separate supplies that this device requires from the power supply being designed. The designer could if they wish omit some at this stage by selecting them; useful if they are using a totally separate supply for specific parts e.g. the output stages (Vcco#n) might be powered directly from a separate circuit for robustness. Once happy, the designer will click 'Add Loads' to move to Stage 1.

Stage 1: Summary of FPGA Loads that are selected.

Stage 1: We see listed the loads that the selected FPGA will place on this Power Supply. However the designer may wish to utilise that supply for other parts of the product and so this stage allows them to add other loads (by voltage and current), DDR memory loads, and additional FPGA devices if required. I added some random loads as part of a rough test. Once the designer is happy they have added all the loads that will draw on this power supply, they click 'Submit Project Requirements' and move to Stage 2...

Stage 2: Optimising the Power Supply

Stage 2: A lot has happened after clicking that button! The WEBENCH tool has looked at all of the load requirements for this project and run through its internal database of power supply designs to generate a proposed set of solutions. We are in the optimising stage so can look through those solutions and select which best meets our requirement. There are six designs proposed in this example. As we click through the list we can see that they are characterised by their efficiency, BOM cost and board footprint. The graph is useful for visualising how close the performance is of the different designs. The diagram in the bottom-right corner shows that each solution power supply is actually made up of sub-circuits (the coloured rectangles).

Stage 2: Zoom in of Screen

Stage 2: I have zoomed in the screen to show more detail from the block diagram. This hierarchical diagram shows the sub-circuits main driver ICs and their associated loads. For the project solution I chose, the sub-circuit 'SUPPLY_1' is realised by the TPS54336A IC, whilst 'SUPPLY_2' is realised by the LM3152-3.3 IC. Clicking 'view project details' moves on to Stage 3...

Stage 3: Detail on the selected design

Stage 3: This shows a summary of our chosen design for the overall power supply. The designer can investigate each of the sub-circuits individually to understand what proportion of the three main characteristics they utilise. In this example I have selected the 'SUPPLY_2' sub-circuit and it shows that it uses the larger percentages of BOM cost, footprint and power dissipation. In the bottom table the designer is shown a choice of alternate designs that could be utilised for 'SUPPLY_2'. This is useful as the designer may have preferred manufacturers or perhaps they are trying to utilise existing stock components. The designers are free to swap each sub-circuit as required. The designer clicks 'create project' to move to Stage 4...

Stage 4 appears to require sign into a TI account

Stage 4: This appeared to require a sign in to a TI account....luckily I have one. It was at this stage though that I first reverted to starting over and therefore my cobbled together design totally changes.

Stage 4: Summary of This Design

Stage 4: The designer has finished the design with WEBENCH help. At this stage they can browse around the power supply design ensuring all aspects meet the requirements, looking for any discrepancies and adjusting as required. They are still free to adjust the sub-circuits or select an entirely different design. There are many new options available such as complete BOM parts list, thermal simulation options and completed schematics (in previous stages the component values were not given). Additional options are accessed via the new top tool bar or by clicking on the required panel.

Stage 4: Export Options

Stage 4: Clicking on the Schematic panel shows the final sub-circuit design along with all component values. The designer can also export that sub-circuit for simulation or incorporation into their CAD packages. Looking at the short list in the screen shot, all of the main CAD file formats are provided for.


5.     Walk Through v. Digilent Arty S7 Board

My initial plan for this section was to look up the device used on my Digilent Arty S7 board and utilise the board spec to see what WEBENCH suggests the power supply configuration. The board uses the Spartan 7 - XC7S50 but although the Farnell webpage for that device displays the WEBENCH icon, clicking on it takes me to the WEBENCH tool where the device is not listed.


6.     Walk Through v. Digilent PYNQ Board

The other FPGA board I have is a Digilent PYNQ - that is based on a Xilinx XC7Z020-2CLG400 device. On the Farnell website that device does have a WEBENCH icon and it is also listed on the WEBENCH tool under Stage 0. Therefore I will run through an example design using the WEBENCH tool and at the end compare to what the PYNQ board has implemented. The Digilent PYNQ website provides the following information for more complex projects, where the 500mA capability of the USB port is insufficient, that an external 7-15v DC power supply can be used. The specification also mentions that the onboard regulator is based on the Texas Instruments TPS65400 PMU. Hopefully we will see that TI device getting selected by WEBENCH in one of the proposed solutions.


SupplyCircuitsCurrent (max/typical)
3.3VFPGA I/O, USB ports, Clocks, Ethernet, SD slot, Flash, HDMI1.6A/0.1A to 1.5A
1.0VFPGA, Ethernet Core2.6A/0.2A to 2.1A
1.5VDDR31.8A/0.1A to 1.2A
1.8VFPGA Auxiliary, Ethernet I/O, USB Controller1.8A/0.1A to 0.6A

Table 1: PYNQ-Z1 power supplies [copied from the PYNQ Website]

After adding the base Zynq device's loads, I tweaked them slightly to match table 1; namely I changed the DDR voltages from 1.3v to 1.5v and I changed the Vco from 1.3 to 3.3v. Next I wanted to add additional loads for the DDR3 memory, the HDMI, USB and the ethernet port etc. My plan was to get some indication of values from the internet as way of a quick look rather than a conduct an indepth analysis of the board as I just wanted to prove how near the WEBENCH designs were to that phsically used on the PYNQ board. The following table details my assumptions and how I arrived at some of those approximate values:

{tabbedtable} Tab LabelTab Content

The board uses the IS43TR16256A-125KBL device (DDR3-1600K) and from the datasheet it would seem that a maximum current of 261mA could be required at 1.5v. I wasn't too sure what to put whithout reading in detail but for this simple example added 0.26 for both IVddq and Itt.

Quad SPI Flash

This uses the Spansion S25FL128S device and looking at their datasheet an estimate for maximum current would be approx. 100mA at 3.3v, therefore I added this as a standard load.

SD Slot/Card

I have added a load of a nominal 200mA at 3.3v using a table in this datasheet noting that some are up to 400mA requirement.

System ClocksThese are listed under the 3.3v but nothing obvious from the PYNQ datasheet regarding the current consumption. I have gone for a nominal 50mA.
USB PortThe drain or supply via the USB port is not specified apart from the voltage at 3.3v. I have nominally chosen 50mA.
USB HostWithout delving in too far to the specification on the Microchip USB3320 tranceiver IC,  I have opted for 30mA at 1.8v and added that as a separate load.
Ethernet Controller

The PYNQ board uses the Realtek RTL8211E-VL device but I could not determine the current requirement from its datasheet . I opted for @1v @100mA which seems reasonable.

LEDs and Switches

With 330R resistors, a supply of 3.3v and a Vf of perhaps 2.1v gives a current of 3.6mA each. e.g. 15mA at 3.3v to represent all four of the plain LEDs.


No resistor values are given for the tri-colour LED. They are not overly bright and so an estimate of 40mA per colour (120mA per LED) would seem sensible. They operate at 5v from Figure 12.1 of the PYNQ datasheet. As 5v isn't specified in the PYNQ table I have also chosen this at 3.3v


The switches also have limiting resistors in series that have no given values. A value of 330R is often seen in similar circuits, which would result in 10mA per switch (there are six inputs) so 60mA at 3.3v is used here.

HDMIThis is listed under the 3.3v loadings. The RPi forum indicates that 50mA could be applicable for HDMI port current consumption.
Pmod PortsThese two channels are specified at 3.3v 1A each.


Therefore after selecting the base FPGA device I added additional loads and DDR loads as per my calculations above (noting that with all peripherals operating at max. I could possibly overload the onboard regulator).


By stage 2 it is clear that my design had deviated a lot from that used on the Digilent board. On my design the 1v for Vccint is already shown as 4.93A (pre set as the device value) which is much higher than that specified by the Digilent Table 1; additionally in my design the 1v is then derived from the 3.3v. There are five sub-circuits proposed for the final solution by WEBENCH whereas the PYNQ only utilises one (the TPS65400 PMU ). It is here that my novice understanding of FPGA is preventing me obtaining a similar solution as I do not know if the Vccint is a maximum predicted value nor how the PYNQ developers selected their value for this 1v rail.


Maximum Load Design for PYNQ

I then had an alternative idea. I deleted all of the loads and added the maximum loads based on the PYNQ board's table 1. This produced a choice of five designs but they all had more than one sub-circuit.

{gallery} PYNQ_Max_Design

PYNQ - Maximum Load Requirements

In this screen shot I have entered the maximum loads as specified in the PYNQ documentation i.e. regardless of devices.

PYNQ - Maximum Load Designs

We can see that WEBENCH has proposed five possible solutions to the loading requirements. All utilise more than the single device solution that the PYNQ actually uses.


Typical Load Design for PYNQ

I also tweaked the loads down to their typical values from table 1 and again was presented with a multiple sub-circuit solution but that design too resulted in range of multiple sub-circuits.

{gallery} PYNQ - Typical Loads

PYNQ - Typical Load List

The typical loads as utilised by the PYNQ and given in Table 1 of their documentation.

PYNQ - Typical Load Designs

WEBENCH proposes four solution designs for this load configuration. Again, none of them are based on a single device as utilised in the PYNQ board.


Whilst I was finding it difficult to prove the design flow that Digilent used and coming up with a similar design, nevertheless the WEBENCH tool was providing good power supply solutions.


7.    FPGA-free Designs

Earlier I hinted that it should be possible to delete all of the FPGA loads and carry on using the WEBENCH FPGA Power Architect tool for other complex power supplies where the final circuit does not even contain an FPGA device. In this section I tried just such an approach...what would it suggest for a 5v 1.5A requirement (derived from 7-15v)?


5v - 1.5A Power Supply

Two proposed solutions were given from WEBENCH. One consisted of a single device solution and the other used two stages to generate the 5v output. Efficiencies were 89% and 93.4%.


5v at 1A + 3.3v at 500mA

Again there were two proposed solutions; one utilising two sub-circuits whilst the other utilised four (and also took up more board space, was less efficient and cost more).


[NB: There also turns out to be a WEBENCH tool that skips past the pre-populating FPGA load section and is for just such simple power supply designs.]


Other WEBENCH Reviews on Element14

by kk99 here

by hans_ober here

by snidhi here

by jc2048 here


Texas Instruments


WEBENCH Webinar Video


Digilent PYNQ



9.     "Is That It?"

In answer to the question "Is that all WEBENCH does?" (as if that wasn't enough), the answer is, definitely no.


By clicking 'new' under the WEBENCH FPGA Power Architect tool, or going directly from the WEBENCH webpage, we get a different screen presenting many other tools along the top bar.

Other WEBENCH Tools

Working across the options there are tools for:


  • Simple Power Supplies (like how I utilised the WEBENCHFPGA Power Architect and deleted the FPGA loads).
  • LED design tool with options for series and parallel loads
  • LED Architect
  • Power Architect (similar to FPGA Power Architect but without the pre-configured loads)
  • FPGA Power Architect (as reviewed above)
  • Hot Swap Controller Tool
  • Simple Switching PSU
  • Filter Designer - includes lowpass, highpass, bandpass, bandstop and allpass
  • Clock Architect
  • Load Switch Tool
  • Interface Tool
  • DDR Power Tool
  • Sequencing Tool
  • Battery Charger Tool
  • Motor Drivers
  • Op Amp Tool



10.     Summary


  • WEBENCH FPGA Power Architect will suggest a range of suitable power supply configurations for powering the selected FPGA device (and any other peripherals that the designer wishes to add).


  • For someone with no knowledge of FPGA design, I thought this would be more difficult to use than it turned out. The WEBENCH tool was very intuitive and as a result I learnt and reinforced my understanding of power supplies.


  • Linking the WEBENCHFPGA Power Architect from selected products on the Newark/Farnellwebsites will save the busy design engineer from searching around whilst also enlightening those who were unaware of the product. That said, I could not see the WEBENCH icon from my Firefox browsers. Had I not been actively searching to activate WEBENCH I would have been oblivious that it existed.


  • Setting up a TI account will allow designers to finalise the design and to experiment with some of the CAD tools available such as thermal constraints and circuit simulation.


  • Although this review was of the TIWEBENCHFPGA Power Architect tool it has shown that the FPGA tool is also capable of designing complex power supplies for non-FPGA projects (simply omit the FPGA loads and add your own). However the WEBENCH software includes a similar tool for basic power supply circuit generation. WEBENCH consists of a much more varied set of design support tools - many of which will appeal to electronic designers - I recommend you have a look at some of them.


  • As always, a big thank you to the Element 14 Team and Randall for letting me test out the WEBENCH software, to TI for producing the valuable WEBENCH toolset and lastly for all the support and device samples that TI have kindly given to me over the last 20+ years.