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DIY Test Equipment

1 Post authored by: koudelad

Introduction

When I saw Jon's The ByEar 2000, I remembered a Cypress' video showing a construction of an analog alarm and posted that as an comment under his blog post.

PSoCs usually have many integrated analog and digital peripherals, so I thought I could make a compilation of both mentioned projects. I am an amateur, so don't expect scientific explanations or ground-breaking discoveries I only built this device using a CY8CKIT-050 PSoC® 5LP Development Kit, which is obviously an overkill, but the same can be performed using a much small USB stick kit, featuring PSoC 5LP: CY8CKIT-059 PSoC® 5LP Prototyping Kit With Onboard Programmer and Debugger. Please do not consider this as a finished product, but just as a set of ideas for PSoC beginners.

How does it work

 

Hardware / schematics

Below is the schematics of the whole circuit. I decided to power the circuit by a 3,3 V, meaning it can serve as a programmable logic probe for voltage levels of 3,3 V or lower.

I downloaded a 74LVT125 datasheet to get the LVT families logic levels:

High-level input voltage Vih is supposed to be minimally 2 V.

Low-level input voltage Vil is supposed to be maximally 0,8 V.

 

 

Jon has described his circuit very well, so I am just going to list the differences / PSoC 5LP specifics:

  • LogicInput pin is connected to the voltage tested and TonOuput to a buzzer or a speaker.
  • There are two VDAC components and their purpose is to generate a reference voltage for the comparator. These components are programmable in a PSoC 5LP and I have chosen a range of 0 - 4,080 V (16 mV / bit), however, as I am powering the circuit by Vdd = 3,3 V, the maximum reference voltage generated would be Vdd. (The good thing is that PSoC Creator makes you aware of this fact, so it's not a surprise for starting engineers / makers.) One VDAC is set for logic low level 0,8 V and the other for logic high level 2,0 V.

  • VDAC outputs are fed into the inverting inputs of the comparators. Input of the logic probe is fed into both of the comparators, but to the non-inverting inputs. The comparators have to decide then, whether the logic input is lower than Vil (and obviously Vih), between Vil and Vih, or above Vih (and Vil, of course). There is one hypothetical fault condition, that the high voltage level comparator will output a logic high, while the low voltage level comparator will ouput a logic low. I hope this won't happen, but the situation will be taken care of by the sound signaling part of the circuit. By the way, the comparators' synchronization is bypassed, so they don't expect to be clocked.

 

The rest of the circuit is used to produce a sound output so the user has an idea of the voltage level measured.

 

  • Two PWM modules are used to create two sounds with a different frequency, one for logic high and one for logic low.

 

  • As you probably noticed, there is an OR gate mixing both of the PWM outputs together. This was just found by an experiment to create a sound that would differentiate from logic low and logic high sound. This could definitely be done many other ways, using more internal PSoC resources.
  • All the outputs are fed into the multiplexer and the meaning is to provide separate channels with all the possible sound outputs, so only one sound buzzer is needed. (This probably isn't the smartest description of a multiplexer usage, right?) The multiplexer has four inputs, the last is not needed, so I connected it to a logic 0, but this input is never used.
  • The fun part is the control function of the multiplexer. We have two comparator outputs and their output combination tells us in which boundaries is the input voltage. This is where a lookup table (LUT) comes in. It is basically a definition of a discrete function. We have two inputs (4 possible states) and need two outputs for controlling which frequency output will be connected to a buzzer. Here is the definition:

As I mention before, state 0x02 should never happen, but it's output is the same as if the voltage is between the voltage levels of logic low an logic high. This means that the weird sound produced is "not defined voltage level" or "logic probe is broken"

 

Software

Now comes the easier part, the PSoC code (main.c):

 

#include "project.h"

int main(void)
{
    CyGlobalIntEnable; /* Enable global interrupts. */


    // Starts both VDACs
    VDAC8_LogicLow_Start();
    VDAC8_LogicHigh_Start();
  
    // Starts both comparators
    Comp_LogicLow_Start();
    Comp_LogicHigh_Start();
    
    // Starts both PWMs
    PWM_LogicLow_Start();
    PWM_LogicHigh_Start();
    
    for(;;)
    { 
      /* Place your application code here. */
    }
}

 

Pretty short, right? I think the device could be put into a sleep mode, but I will leave this as reader's homework.

 

Resources

Here is a screenshot of PSoC 5LP resources used. Please note that the majority of RAM is usually allocated for a stack and heap and can be reduced if not needed.

 

 

Conclusion

Using a different PSoC power voltage and different VDAC voltages can be used to adjust the circuit to other voltage levels or needs.

PSoC is very versatile and the circuit can be modified in a countless ways (adding a button to start measurement, one or more LEDs, display, provide some output for testing other circuits ...)

 

Here is a proof of the working prototype. I used the onboard potentiometer to simulate the input voltage level.

 

 

I also attached the project bundle for anyone interested in exploring the design.

 

For readers willing to experiment more with PSoCs 4 (lower series):

100 Projects in 100 Days

PSoC® 101 Video Tutorial Series: How To Use the ARM® Cortex®-M0 Based PSoC 4 | Cypress Semiconductor

 

David