The PYNQ is a versatile platform that combines the power of FPGA with the flexibility of software(python on linux). Running atop the Zynq series of SOCs from Xilinx, this platform builds towards rapid prototyping of solutions.



In this blog post, I do a brief review of the session, add things that were missing and can prove the useful and finally my little project for the pynqstarter. I do some blinking lets, remote configuration and some other things that will make using the PYNQ board just amazing. Hold on to your hats and lets go!




From the website, here is the abstract:


What is PYNQ?


PYNQ is an open-source project from Xilinx® that makes it easier to use Xilinx platforms.

Using the Python language and libraries, designers can exploit the benefits of programmable logic and microprocessors to build more capable and exciting electronic systems.


PYNQ can be used with Zynq, Zynq UltraScale+, Zynq RFSoC, Alveo accelerator boards and AWS-F1 to create high performance applications with:


* parallel hardware execution

* high frame-rate video processing

* hardware accelerated algorithms

* real-time signal processing

* high bandwidth IO

* low latency control

In the three part series on getting started with Pynq, the first lab saw us doing an introduction to the PYNQ plaftorm and the framework itself. It is interesting to see that the whole thing runs on Peta Linux and though for this lab we will be using Jupyter, there is also the option to dive into the shell using ssh and run python scripts directly.

The libraries expose a Python API for GPIO and programmable logic interaction. The overlays are actually bitstreams that will be executed on the configurable logic of the SOC and we will be using the Python API to pass data to and from these H/W blocks.


Though I am not writing about the ZYNQ device as such here is a block diagram for the same. [Image:\



It shows the Programmable Logic and Processing System and how they can connect with each other.


Getting Started


Getting started was easy using the pre-lab section of the handouts provided. A video would have been helpful though I was able to find the offical documentation as well which proved helpful.


The Pynq Z2 board takes around 2 minutes for me to start up thought the network configuration happens much quicker.


The link for the official docs is and has some pretty useful info.


The Jupyter notebook can be accessed through the browser but that is not the only way to get in. The SSH daemon allows users xilinx and root in with the password xilinx [lower case all] and drops you into a bash shell. There you can install and upgrade to you hearts content. I hope to explore this more later.


The last way to access the PYNQ board is via the samba share. Essentially the code folders on the linux system show up as a windows network by

One last thing about getting started. Git is installed on the linux side of things so you can directly clone the files to the PYNQ board instead of typing stuff in.

[Found this brilliant image on git on the internet and just had to use it]


Overlays and what they mean


Consider overlays as the modules for the hardware side. For the first lab, we ran a piece of python code that looks like this....



@brief  basic blinky code for the Xilinx PYNQ board

@author Inderpreet Singh



from time import sleep

from pynq.overlays.base import BaseOverlay


base = BaseOverlay("base.bit")


while True:

    for led in base.leds:



    for led in base.leds:



OK well maybe I ran this code and you ran something else.


So this code imports the BaseOverlay module and uses it to access the base.bit file which is downloaded in the overlays folder which for me was \\\xilinx\pynq\overlays\base


So essentially you can access any bit file as long as it is generated with the correct interfaces(I am assuming here since there is also a .hwh file and other files that tell python what interfaces are available.


This block of base.bit along with all the config files that make it usable with the Python stuff is what is called an overlay. Here is a block diagram of what happens inside the base.bit


The Zynq PS is the Processing System or our ARM cortex A9 with Linux and Python where as the Zynq PL is the programmable logic part. It comes with stuff like GPIO blocks(which in themselves consists or registers and clocking systems and what not). I will dive into the code if I get a job but for right now this is as deep as I go. The docs say that they are running a Logic Control Processor  (prolly microblaze processor) for each of the PMOD and ArduinoIO subsystems.


Next comes the Logictools Overlay and my first assignment.


Logictools Overlay

The logictools overlay on PYNQ-Z1 includes four main hardware blocks:

  • Pattern Generator
  • FSM Generator
  • Boolean Generator
  • Trace Analyzer


A PYNQ MicroBlaze is used to control all the generators and analyzers.



For the lab session we use the Pattern Generator to generate a pattern and then use the anaylsis tool to read them back into other GPIOS. I found the source-code for the module at and saw there were other functions. The step function run three times gave me the following output.

Also see:


This ran the system for three clock cycles which means that the system displays all the stimulus once and the analysis part is updated. This is good news if you intend to use it as a test bench of sorts. Not really CPU intensive BUT an experiment with the system none the less. You can also reset the system and run the same tests multiple times.


All the module code is documented at


Pynq and PMODs and Sensors


I initially thought I would do an implementation of I2C but Xilinx beat me to it. The docs for PMOD support and GROVE support is given at though there are examples for most of this stuff.


Simple Project 1


My last take away from this session and experiments was that you could write a simple logic test bench using the logictools overlay. The project builds on the single_stepping generators notebook where we can specify the input conditions. For a two input gate it would be 4 cases(00, 01, 10, 11) and then the boolean generator could be used to test each case.

The code would be modified to be.


boolean_generator = logictools_olay.boolean_generator
# And gate logic
# each Buffer represents a test
# Buffer 4 represents input of 11 to the DUT and the produced output is for LD0 which is an LED
functions = {'Buffer 1': 'LD3 ~= D16',
             'Buffer 2': 'LD2 ~= D17',
             'Buffer 3': 'LD1 ~= D18',
             'Buffer 4': 'LD0 = D19'}


So each LED would represent a test. I could connect an Arduino that would stimulate the DUT which is an AND gate BUT instead I chose to create another blinky as it felt more interesting.

Here is the code.


from time import sleep
from pynq.overlays.base import BaseOverlay
base = BaseOverlay("base.bit")
Delay1 = 0.3
Delay2 = 0.1
color = 0
rgbled_position = [4,5]
total_leds = 4
select_led = 0
while True:
    for led in base.leds:
        if select_led==i:
    if(select_led >=total_leds):


Here is a gif

I got the PYNQ board last night and will be diving into more stuff in the upcoming blogs. Thanks for reading!