Version 4

    WARNING! - There is a problem with the D-Latch circuit!!

    Accuracy is not good - the error can be as great as one HF clock period, which can be significant if using low frequency HF clocks or high difference frequencies!

    I wrote this based on some SIMPLE simulations I have done..

    It describes using an XOR gate for simple heterodyning, and using a D-Latch for clean heterodyning suited to digital circuits.

    Contains schematics and resulting waveforms.


    MUCH MORE ON THIS AND WAVE-SHAPING can be found Here ->