PMGI Resist Characterisation - Through-Silicon Via Conformal Coat

Version 1

    The limiting factor for the future implementation of 3D ICs is through silicon via (TSV)
    technology, which must first be proven so as to enable the necessary layer
    interconnections. This project studies the electrical properties of the spin-on dielectric
    PMGI in conjunction with MicroChem Corporation, as it is essential that these be
    determined before devices containing a large number of TSVs can be implemented on an
    industrial scale. Additionally, the spinning process is characterised in relation to different
    via fill behaviours, along with PMGI strip rates.

     

    From experiments carried out during this project, it has been found that PMGI exhibits a
    relative dielectric constant of ~ 2.5, bulk resistivity of >2.8×10^14 Ohm-m, surface resistivity
    of 9.1×10^14 Ohm per sq, low dissipation factor of 0.01 (at 100 kHz), and a high breakdown
    voltage of >100 MV/m, making it an excellent candidate for use in TSVs.

     

    With quantifiable reflow properties, and a low strip time in NMP of 40 s at 70 °C,
    PMGI is a promising dielectric which would benefit from further characterisation with a
    view to implementing vias in industry within the next two to three years.