Version 6
    BUY NOWBUY NOWDevelopment ToolsTechnical DocumentsVideoFeaturesKit Contents

     

    P0082(Terasic)_1.PNG

    Overview

     

    The P0082 DE0-Nano boardP0082 DE0-Nano board introduces a compact-sized FPGA development platform suited for to a wide range of portable design projects, such as robots and mobile projects. The DE0-Nano is ideal for use with embedded soft processors, it features a powerful Altera Cyclone IV FPGA (with 22,320 logic elements), 32 MB of SDRAM, 2 Kb EEPROM, and a 16 Mb serial configuration memory device. For connecting to real-world sensors the DE0-Nano includes a 8-channel 12-bit A/D converter, and it also features an 13-bit, 3-axis accelerometer device.

     

    The DE0-Nano board includes a built-in USB Blaster for FPGA programming, and the board can be powered either from this USB port or by an external power source. The board includes expansion headers that can be used to attach various Terasic daughter cards or other devices, such as motors and actuators. Inputs and outputs include 2 pushbuttons, 8 user LEDs and a set of 4 dip-switches.

     

    This platform allows user:

    • To extend designs beyond the DE0-Nano board with two external general-purpose I/O (GPIO) headers
    • To handle larger data storage and frame buffering with onboard memory devices including SDRAM and EEPROM
    • Provides enhanced user peripheral with LEDs and push buttons
    • Small and lightweight
    • Re-configurable without requiring superfluous hardware
    • Suitable for mobile designs where portable power is crucial, as it provides three power scheme options including a USB Mini-AB port, 2-pin external power header, and two DC 5-V pins

     

    Key Applications: Broadcast, Consumer, Industrial, Wireless, Wireline.

    More Development Kits and Tools
    More Altera Development KitsAltera Overview
    Development Kits & Platform Roomelement14 Design Centre

     

    Development Tools


     

    Software Development Tools:

     

    Tool TypeSupplierSupported FamilyMPNDescription
    IDEAlteraALL Altera DevicesAltera Quartus II

    It's the industry's number one software in performance and productivity for CPLD, FPGA, and HardCopy ASIC designs. The Altera Quartus II software, the industry's number one software in performance and productivity for CPLD, FPGA, and HardCopy ASIC designs. Learn More

     

     

    Hardware Development Tools:

     

    Tool TypeSupplierSupported Family MPNDescription
    Download CableAlteraALL Altera DevicesPL-BYTEBLASTER2NPL-BYTEBLASTER2NThe ByteBlaster II enables a PC to configure or program Altera devices. The download cable drives configuration or programming data using a standard parallel printer port from the PC.
    Download CableAlteraALL Altera DevicesPL-USB-BLASTER-RCNPL-USB-BLASTER-RCNThe USB-Blaster drives configuration or programming data from the PC to configure or program Altera devices. The download cable interfaces to a standard USB PC port.

     

    Back to top

    Technical Documents


    Learning Center
    TypeDescription
    User ManualAltera: User Manual for DE0-Nano board
    DatasheetAltera: Datasheet for Cyclone IV Device

     

    Design Elements
    TypeDescription
    SchematicAltera: Schematic File for P0082 DE0-Nano Development Board
    Application LibraryAltera: Application Library for DE0-Nano Control Panel
    Application LibraryAltera: Software Code for Demonstration Examples
    Application LibraryAltera: Application Library for DE0-Nano System Builder

     

    Back to top

    Video


     

     

    Back to top

    Kit Features


     

    The DE0-Nano Development Board features the following:

    P0082(Terasic)_2.PNG

    • Cyclone IV EP4CE22F17C6NEP4CE22F17C6N FPGA
      • 22,320 LEs
      • 594-Kb embedded memory
      • 66 embedded 18x18 multipliers
      • 4 general-purpose phase-locked loops (PLLs)
      • 153 maximum FPGA I/O pins
    • Configuration status and set-up elements
      • Onboard USB-BlasterTM circuit for programming
      • Altera® serial configuration device – EPCS16
    • Expansion header
      • Two 40-pin headers (GPIOs) provides 72 I/O pins
      • Two 5-V power pins, two 3.3-V power pins, and four ground pins
      • One 26-pin header provides 16 digital I/O pins and 8 analog input pins to connect to analog sensors
    • Memory devices
      • 32-MB SDRAM
      • 2-Kb I2C EEPROM
    • General user input/output
      • 8 green LEDs
      • 2 debounced push buttons
      • 4 dual in-line package (DIP) switches
    • G-sensor
      • 3-axis accelerometer with high resolution (13 bits)
    • Analog-to-digital converter
      • 8-channel, 12-bit analog-to-digital converter
      • 50 ksps to 200 ksps
    • Clock system
      • Onboard 50-MHz clock oscillator
    • Power supply
      • USB Type Mini-AB port (5 V)
      • Two DC 5-V pins of the GPIO headers (5 V)
      • 2-pin external power header (3.6 V – 5.7 V)
    • Connectivity
      • Connect D5M
        • Connect with 5-megapixel CMOS sensor (D5M)
      • Connect LTM
        • Connect with LCD touch screen module (LTM)
      • Connect THDB-ADA
        • Connect with analog-to-digital / digital-to-analog conversion daughtercard (THDB-ADA)
    • USB Mini-B cable

     

    Back to top

    Kit Contents


     

    The Altera's P0082 DE0-Nano Development BoardP0082 DE0-Nano Development Board supplied with below contents:

     

    • DE0-Nano board
    • DE0-Nano system CD ROM
    • Altera Complete Design Suite
    • DE0-Nano quick start guide
    • USB Cable
    Back to top