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    Kit Overview

     

    The Analog Devices EVAL-CN0227-HSCZEVAL-CN0227-HSCZ circuit is a wideband receiver front end based on the ADL5562ADL5562 ultralow noise differential amplifier driver and the AD9467AD9467 16-bit, 250 MSPS analog-to-digital converter.

     

    The third-order Butterworth antialiasing filter is optimized based on the performance and interface requirements of the amplifier and ADC. The total insertion loss due to the filter network and other components is only 1.8 dB. The overall circuit has a bandwidth of 152 MHz with a pass band flatness of 1 dB. The SNR and SFDR measured with a 120 MHz analog input are 72.6 dBFS and 82.2 dBc, respectively.

     

    The circuit accepts a single-ended input and converts it to differential using a wide bandwidth (3 GHz) M/A-COM ECT1-1-13M 1:1 transformer. The ADL5562ADL5562 3.3 GHz differential amplifier has a differential input impedance of 400 Ω when operating at a gain of 6 dB and 200 Ω when operating at a gain of 12 dB. A gain option of 15.5 dB is also available.

     

    The ADL5562ADL5562 is an ideal driver for the AD9467AD9467, and the fully differential architecture through the low-pass filter and into the ADC provides good high frequency common-mode rejection, as well as minimizes second-order distortion products.

     

    This circuit uses a modified AD9467-250EBZAD9467-250EBZ circuit board and the HSC-ADC-EVALCZHSC-ADC-EVALCZ FPGA-based data capture board. The two boards have mating high speed connectors, allowing for the quick setup and evaluation of the circuit’s performance. Modifications made to EVAL-AD9467-250EBZ Evaluation Board include that the ADL5562 and some of its supporting components have been already installed. However, in order to engage this active signal path including the lowpass filter some R/L/C components were added, removed or changed.

     

     

    Key Applications: Communications, Radar

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    Technical Documents


    Learning Center

     

    TypeDescription
    User GuideADI: User Guide (CN-0227) for High Performance, 16-Bit, 250 MSPS Wideband Receiver with Antialiasing Filter
    User GuideADI: User Guide (UG-200) for Evaluating the AD9467 16-Bit, 200 MSPS/250 MSPS ADC
    DatasheetADI: Datasheet for AD9467 16-Bit, 200 MSPS/250 MSPS Analog-to-Digital Converter (Rev C)
    DatasheetADI: Datasheet for ADL5562 3.3 GHz Ultralow Distortion RF/IF Differential Amplifier (Rev C)
    Application NoteADI: Application Note (AN-835) for Understanding ADC Testing and Evaluation

     

    Design Elements

     

    TypeDescription
    SchematicsADI: Schematics for CN0227 Evaluation Board
    BOMADI: BOM File for CN0227 Evaluation Board
    LayoutADI: Layout File for AD9467
    Reference DesignADI: Reference Design for AD9467 Evaluation Board, ADC-FMC Interposer and Xilinx
    Reference DesignADI: Reference Design for AD9467 Native FMC Card / Xilinx Reference Design
    Simulation ModelADI: IBIS Model for AD9467BSV (Valid for All Speeds)

     

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    Kit Features


    CN0227_00_1024.gif

    Key Features for AD9467AD9467 are as below:

    • 75.5 dBFS SNR to 210 MHz at 250 MSPS
    • 90 dBFS SFDR to 300 MHz at 250 MSPS
    • SFDR at 170 MHz at 250 MSPS
      • 92 dBFS at −1 dBFS
      • 100 dBFS at −2 dBFS
    • 60 fs rms jitter
    • Excellent linearity at 250 MSPS
      • DNL = ±0.5 LSB typical
      • INL = ±3.5 LSB typical
    • 2 V p-p to 2.5 V p-p (default) differential full-scale input (programmable)
    • Integrated input buffer
    • External reference support option
    • Clock duty cycle stabilizer
    • Output clock available
    • Serial port control
      • Built-in selectable digital test pattern generation
      • Selectable output data format
    • LVDS outputs (ANSI-644 compatible)
    • 1.8 V and 3.3 V supply operation


     

     

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    Kit Contents


     

    The Analog Devices EVAL-CN0227-HSCZEVAL-CN0227-HSCZ Evaluation Board is supplied with below contents:

    • Evaluation Board

     

     

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