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    MCU/MPU/DSP > Development Platforms & Kits > Primary Platforms >
    • Lark Board - Altera Cyclone V SoC Evaluation Kit
    • Lark Board - Altera Cyclone V SoC Evaluation Kit

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    Lark Board is an evaluation board designed by Embest based on an Altera ARM (Cortex-A9 dual-core) FPGA processor. The SoC, named 5CSXFC6D6F31 that comes from Cyclone V SX family, integrates not only the traditional FPGA fabric, but also an ARM Cortex-A9-based HPS (operating at 800MHz) and a high-speed transceiver (3Gbps Serdes) hard subsystem

    Lark Board provides 1GB DDR3 SDRAM separately for both ARM and FPGA, and has 4 high-speed USB2.0 Host interfaces, a TF card slot for mass storage, a 12-bit camera interface, a VGA interface, a 24-bit LCD interface, PCIe, UART, JTAG, 3G bps SDI input/output and a HDMI interface. Additionally, two 2*200-pin connectors are mounted on the board in order to make the unused pins of HPS/FPGA available for users. Lark Board uses a switching power supply controller chip (integrated with inductor) that comes from Altera’s Enpirion family to provide a stable and efficient output for each BANK of FPGA. Meanwhile, it has two on-board DIP switches used to enable various voltage levels required by the different interfaces on the board with the purpose to facilitate power consumption evaluation conducted by users

    Lark Board comes with a lot of FPGA example applications and the corresponding source code, Linux 3.10 and u-boot source code and Debian 7.4 system image, as well as schematics and key chips’ datasheets to help users implement evaluation and secondary development fast.

    Key Applications: Medical Instruments, Video Surveillance, Industrial Control



    Hardware Features:

    • FPGA : Altera Cyclone V SoC – FBGA 896 Package – 5CSXFC6D6F31.
    • Core Resources of Cyclone V SoC FPGA
      • FPGA includes up to 110K logic cells (LE), 5570 M10K memory blocks, 621 MLABs, 112 variable-precision DSP blocks, 224 18x18 multipliers, 6 PLLs, 288 IOs, 72 72 LVDS transceivers, and a memory controller
      • HPS includes a dual-core ARM Cortex A9 MPCore processor block, a memory controller, 3 PLLs and 181 general IOs, as well as a rich set of peripheral interfaces such as UART, I2C, USB, SPI and GPIO
      • 2 x PCIe hard IPs and 9 x 3Gbps transceivers
    • Memory
      • 1GB DDR3 SDRAM for HPS and 1GB DDR3 SDRAM for FPGA
      • 4GB eMMC Flash
    • Data Transfer Interfaces
      • A SDI high-resolution serial digital interface that supports SMD standard interface and provides a SDI TX and a SDI RX
      • A 12-bit digital camera input
      • 2 x 12-bit high-speed ADC interfaces that support SMA input
      • A PCIe×4 interface for PCIe×4, PCIe×2 and PCIe×1 adapter cards
      • A RJ45 interface that supports RGMII gigabit Ethernet
      • 4 x high-speed USB2.0 Host interfaces
      • A TF card slot and an eMMC 4GB memory (TF card and eMMC flash cannot be used simultaneously)
      • 2 x 40-pin expansion headers. 1 for FPGA (for LVDS, RSDS, SLVS, mini-LVDS signals) and 1 for HPS expansion (for I2C, SPI, QSPI, UART, GPIO signals)
    • Debugging Interfaces
      • An on-board USB Blaster II (Mini USB Type B)
      • A 10-pin JTAG interface can be used to connect an external USB Blaster
    • Audio/Video Interfaces
      • A 24-bit true-color LCD interface (supporting 4-wire touch screen)
      • A VGA interface
      • A HDMI interface
    • Other Interfaces
      • A power jack (12V~30V round DC power jack and ATX 4-pin standard power connector)
      • A reset button and 5 user-defined buttons
      • A RTC
    • General Features
      • Operating Temperature: 0~70°C
      • Input Voltage: 12~30V
      • Operating Humidity: 20% ~ 90%
      • Product Dimensions: 180 mm * 120 mm
      • PCB Layers: 10-layer PCB

    Software Features:

    • OS: Yocto (an embedded version of Linux)
    • U-boot Version: u-boot 2013.01.01
    • Linux Version: Linux 3.10
    • Boot Mode: support Linux system booting from TF card or eMMC

    Ships With

    • Lark Board×1
    • USB cable for FPGA programming and control×1
    • 19V DC power adapter×1
    • 8GB TF card×1
    • 12V-DC Fan


    Whether a CR1220 battery is installed on board for RTC circuitry?
    Lark Board has no CR1220 battery installed on board. Need to buy separately for implementation of RTC circuitry and keep a proper clock after power supply is turned off.
    Does the board support UART serial debugging?
    Yes, it has UART serial debugging interface. Connect the serial port J24 or J25 of Lark board to a PC via a USB-To-TTL conversion cable (UART8000-U, to be purchased separately).
    Which LCD modules are supported by the Lark Board currently?
    Currently LCD8000-43T/LCD8000-70T/LCD8000-97C Touch-Screen Modules are supported by the board.
    Which digital camera module is currently supported by the Lark Board ?
    The Lark Board is currently compatible with Embest's CAM8000-D camera module.
    Why is it the TF card and eMMC flash in the Lark Board can not be used simultaneously ?
    As there is only one TF/SD controller in the ARM based HPS (Hard Processor System) of Cyclone V SoC, the TF card and eMMC flash would have to share one channel, which means TF card and eMMC flash can not be used simultaneously.
    Does the ADC in the Lark Board support differential input or single ended input?
    The ADC on Lark Board supports dual channel differential input. If it's a single ended input, please short the jumper JP1 (channel A) or JP3 (channel B) on the board. If it's a differential input, there is no need to short the jumpers.

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