Version 1
    Welcome to -V1
    The Ultra96-V1 is an Arm-based, Xilinx Zynq UltraScale+ MPSoC dev board modeled after the Linaro 96Boards' CE (Consumer Edition) specification. It defines a standard layout for development platforms that can be used by software application, hardware device, kernel, and other system software developers. It is unique in the 96Boards community with a range of potential peripherals and acceleration engines in the programmable logic.
    Overview

    Ultra96™ is an Arm-based, Xilinx Zynq UltraScale+™ MPSoC development board based on the Linaro 96Boards specification. The 96Boards’ specifications are open and define a standard board layout for development platforms that can be used by software application, hardware device, kernel, and other system software developers. Ultra96 represents a unique position in the 96Boards community with a wide range of potential peripherals and acceleration engines in the programmable logic that is not available from other offerings. Product Brief (Datasheet)

    Ultra96 provides four user-controllable LEDs. Engineers may also interact with the board through the 96Boards-compatible low-speed and high-speed expansion connectors by adding peripheral accessories such as those included in Seeed Studio’s Grove Starter Kit for 96Boards.

    Micron LPDDR4 memory provides 2 GB of RAM in a 512M x 32 configuration. Wireless options include 802.11b/g/n Wi-Fi and Bluetooth 4.2 (provides both Bluetooth Classic and Low Energy (BLE)). UARTs are accessible on a header as well as through the expansion connector. JTAG is available through a header (external USB-JTAG required). I2C is available through the expansion connector.

    Ultra96 provides one upstream (device) and two downstream (host) USB 3.0 connections. A USB 2.0 downstream (host) interface is provided on the high speed expansion bus. Two Microchip USB3320 USB 2.0 ULPI Transceivers and one Microchip USB5744 4-Port SS/HS USB Controller Hub are specified.

    The integrated power supply generates all on-board voltages from an external 12V supply (available as an accessory).

    Click on the images to enlarge

    Front View
    Side View
    Side View
    Block Diagram

    Features

    • Xilinx Zynq UltraScale+ MPSoC ZU3EG SBVA484
    • Micron 2 GB (512M x32) LPDDR4 Memory
    • Delkin 16 GB MicroSD card + adapter
      • Pre-loaded with PetaLinux environment
    • Wi-Fi / Bluetooth
    • Mini DisplayPort (MiniDP or mDP)
    • 1x USB 3.0 Type Micro-B upstream port
    • 2x USB 3.0, 1x USB 2.0 Type A downstream ports
    • 40-pin 96Boards Low-speed expansion header
    • 60-pin 96Boards High speed expansion header
    • 85mm x 54mm form factor
    • Linaro 96Boards Consumer Edition compatible

    Target Applications

    • Artificial Intelligence
    • Machine Learning
    • IoT/Cloud connectivity for add-on sensors

    Kit Includes

    • Ultra96 development board
    • 16 GB pre-loaded MicroSD card + adapter
    • Voucher for SDSoC license from Xilinx
    • Quick-start instruction card

    Optional Add-on Items

    Other Qualified microSD Cards

    Video

    Introduction to Ultra96

    Reference Designs
    Ultra96

    Development Using Ubuntu Desktop Linux

    These tutorials provide a means to integrate several different technologies on a single platform. Using the Avnet target boards, we have the power of a ARM Cortex-A9 processors, combined with the unrivaled flexibility of Xilinx programmable logic to implement custom hardware systems. We use a Linux kernel as the foundation operating system running on the processor cores which enables a very large ecosystem of software to be run on our development kits. Virtual machines can provide a very convenient Ubuntu development environment for building the hardware platform and cross-compiling software to target the Processing System.


    SDSoC Baremetal Platform - Xilinx Matrix Multiply Example

    SDSoC PetaLinux Platform - Xilinx Matrix Multiply Example

    Base Technical Reference Design

    PYNQ Framework for Ultra96

    Accelerate your designs with PYNQ, a Python friendly development framework for the ZYNQ SoC family. Available now for Ultra96.


    Tutorials

    Accelerated Image Classification via Binary Neural Network

    This page provides an introduction to the "Accelerated Image Classification via Binary Neural Network" (short AIC) design example. This design example demonstrates how moving software implemented neural networks can be dramatically accelerated via Programmable Logic. In this design a Binary Neural Network (BNN) is implemented. Depending on silicon platform an acceleration of 6,000 to 8,000 times is demonstrated. Via the graphical user interface the user can see metrics, images and classification results.


    SDSoC Baremetal Platform - Xilinx Matrix Multiply Example

    SDSoC PetaLinux Platform - Xilinx Matrix Multiply Example

    Deephi Deep Neural Network TechTip

    DNNDK™ (Deep Neural Network Development Kit) - DeePhi™ deep learning SDK, is designed as an integrated framework, which aims to simplify & accelerate DL (Deep Learning) applications development and deployment on DeePhi DPU™ (Deep Learning Processing Unit) platform.

    Use following link to visit Deephi.com for more information (select the Ultra96 tab on the Deephi site)
    Use following link to download the Ultra96 Image file (500mb)

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