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    FPGA Developer Badge

    Do you know enough to be an FPGA Developer? Prove it by taking our FPGA Developer Quiz, with topics such as Microchip's Polarfire FPGAs.

    To earn the FPGA Developer Badge, score 100% on the quiz, rate this document, and leave your feedback on the quiz as a comment.

    Giveaway: If you attained 100% on the quiz, you will be eligible to win one of the 5 HELLO FPGA KitsHELLO FPGA Kits  we are giving away or one of the 5 goody bags. See Terms & Conditions below.

     

    1) An FPGA is a "Field Programmable Gate Array." "Field Programmable" means:

         
         
         
         
       

     

    2) The logic elements of an FPGA are organized in a ________, similar to a gate array.

         
         
         
         
       

     

    3) Microchip's low and midrange density FPGAs contain a certificate injected at manufacturing time, certifying that the device is from Microchip. The certificate also includes device information such as ___________ and ___________.

         
         
         
         
       

     

    4) What is a typical component of a Field Programmable Gate Array?

         
         
         
         
       

     

    5) True or False: Microchip's SmartFusion2, Igloo2, and Polarfire FPGAs use DPA countermeasures licensed from Cryptography Research Inc., a division of Rambus, and are assessed for DPA resistance by a third party lab.

         
       

     

    6) Modern FPGAs can contain features that aid in the development of specific applications. Which one of these is NOT included in a modern FPGA?

         
         
         
       
       

     

    7) To secure data communications, Microchip FPGAs include cryptographic accelerators, like a(n) _______ accelerator, a(n) _________ accelerator, and an elliptical accelerator for the encryption of public and private keys.

         
         
         
         
       

     

    8) True or False: SRAM-based FPGAs often require an external boot device to hold the configuration.

         
       

     

    9) The SONOS non-volatile (NV) technology used in Polarfire FPGAs is built on a ________ technology node.

         
         
         
         
       

     

    10) Flash-based FPGAs are reprogrammable and _______, and therefore _______ reconfiguration at each power on.

         
       
       
       
       

     

    11) Microchip's previous generation FPGAs used floating gate NV technology that required _________ to program. The SONOS technology used in Polarfire FPGAs requires _________ to program, enabling the use of smaller charge pumps.

         
       
       
       
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    12) True or False: FPGAs have lower latency than the typical microprocessor.

         
       

     

    13) FPGAs perform _______ processing, while microprocessors typically execute instructions _____, allowing FPGAs to respond to inputs more quickly.

         
       
       
       
       

     

    14) The Polarfire FPGA has up to __________ I/Os, organized in banks.

         
         
         
         
       

     

    15) How does using an FPGA reduce development cycle risk when compared to an ASIC?

         
       
       
       
       

     

    16) True or False: Non-volatile Flash-based FPGAs have a power-on in-rush current and a configuration current because they are in an indeterminate state at power-on.

         
       

     

    17) An SRAM FPGA use a ___-transistor configuration cell.

         
         
         
         
       

     

    18) A typical SRAM FPGA has ____ leakage current than/as a typical Flash FPGA.

         
       
       

     

    19) Radiation can affect and cause failures in electronic systems, including FPGAs. What are the main causes of radiation in electronic systems?

         
       
       
       
       

     

    20) True or False: An SRAM FPGA is more vulnerable to radiation than a Flash FPGA.

         
       

     

    21) The "switch" leakage path, or "FPGA logic signal path," is the leakage current across a switch in the _________ state.

         
       

     

    22) Differential Power Analysis (DPA) is a technique used by hackers to extract secret keys from an FPGA by measuring the __________ while the device is performing a cryptographic algorithm.

         
       
       
       
       

     

    23) Each Microchip low and medium density FPGA has __________ around critical circuitry to detect probing, in addition to tamper detection circuitry.

         
         
         
         
       

     

    24) The Polarfire transceiver block has 4 lanes and supports data rates from ________ to ________.

         
         
         
         
       

     

    25) True or False: Microchip FPGAs feature Flash*Freeze technology, enabling them to run at ultra-low static power while retaining all the SRAM and registers information.

         
       
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