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    1) True or False: One of the advantages of FPGAs is that they are not limited to a certain type of functionality. They can be configured and reconfigured repeatedly, to perform tasks such as video encoding, artificial intelligence, logic for factory automation, and more.

         
       

     

    2) Because they are capable of being configured and reconfigured, FPGAs are very flexible. This capability enables FPGA-based designs to ______________________.

         
         
         
         
       

     

    3) Xilinx's® Kria™ K26 SoM is designed to address the requirements of executing machine learning applications efficiently on edge devices. To support machine learning, it can be configured with various high performance ______________, with peak performance reaching as high as 1.2 TOPS (Tera Operations per Second) at 300Mhz.

         
         
         
         
       

     

    4) True or False: One of the main logic blocks in an FPGA is a look-up table (LUT), a collection of flip-flops connected to multiplexer input pins. A LUT functions like a truth table, returning a specific output based on the combination of inputs.

         
       

     

    5) The Zynq®-7000 SoC family integrates the software programmability of an ARM®-based processor with the hardware programmability of an FPGA. Which of the following is NOT true of the devices in the Zynq-7000 family?

         
         
         
         
       

     

    6) Many devices at the edge are __________, making FPGAs more suitable than CPUs for their design, because FPGAs have ____________.

         
         
         
         
       

     

    7) The Vitis™ Unified Software Platform is a comprehensive development kit for Xilinx FPGAs and Versal ACAP hardware platforms. To lessen the learning curve for newer developers unfamiliar with HDL, Vitis supports development and open-source libraries for _________________.

         
         
         
         
       

     

    8) VHDL and Verilog are general-purpose digital design languages that can be used to develop code that runs on FPGAs and ASICs. Each has its own style and characteristics. Which of the following statement(s) is/are true?

         
       
       
       
       

     

    9) True or False: FPGAs are parallel in nature, meaning, in general, that tasks are processed independently without influence from other logic blocks. Operations are not competing for the same resources.

         
       

     

    10) In the design of edge devices, FPGAs generally have many advantages over microprocessors; however, one advantage that microprocessors typically have over FPGAs is ___________.

         
         
         
         
       

     

    11) The designs running on FPGAs are mainly coded using ____, a low level language based on a dataflow model where I/Os are connected to a series of function blocks through signals.

         
         
         
         
       

     

    12) Many high end FPGAs contain thousands of _______________, high performance hardware blocks dedicated to arithmetic and logic operations. In many cases, the performance of high end FPGAs rivals or even surpasses GPUs in the FLOPS (floating point operations per second) metric.

         
       
       
       
       

     

    13) Although ASICs can be optimized for maximum performance and efficiency, what are some of the reasons that an FPGA might be better suited for a design?

         
         
         
         
       

     

    14) Artix-7 FPGAs are optimized for low power applications requiring serial transceivers and high DSP and logic throughput. These are ideal for products like portable medical equipment, military radios, and compact wireless infrastructure, where size is an important consideration. The smallest footprint available on an Artix-7 FPGA is _________.

         
         
         
         
       

     

    15) A System-on-Chip (SoC) is a device that pairs FPGAs and microprocessors, allowing for more complex designs, and avoiding the increased cost and latency of multiple chip designs.  Which of the following statement(s) regarding SoCs is/are true?

         
         
         
         
       

     

    16) Generally, a soft processor cannot match the performance of a hard processor; however, what might be a reason to use a soft processor over a hard processor?

         
       
       
       
       

     

    17) Similar to 3D graphics, machine learning and deep neural networks require massive amounts of matrix multiplications, making GPUs effective in AI applications. When dealing with edge devices, however, GPUs have some limitations, including:

         
         
         
         
       

     

    18) As data rates increase, signaling rates in serial systems increase as well. Unfortunately, at such high bandwidth, channel-driven signal distortion is more of an issue, while the bit sampling time needed to process this distortion only grows shorter. The techniques used to compensate for signal distortion are usually called ______ in the transmit domain and _______ in the receive domain.

         
         
       
       
       

     

    19) FPGAs have qualities that make them effective replacements for GPUs in AI-enabled devices; however, one of the biggest challenges in designing with FPGAs is __________.

         
         
         
         
       

     

    20) 7-Series FPGAs have multiple dedicated DSP slices, embedded hardware for DSP processing that combines high speed, low power, and small size. What is the maximum number of DSP48 Slices available on the Kintex-7?

         
       
       
       
       

     

    21) As the appetite for data increases, transceivers in FPGAs and SoCs must keep pace. The transceiver speed supported by the Virtex-7 family is ________ Gb/s.

         
       
       
       
       

     

    22) To create a customized, high-performance, SoC-based system, Xilinx provides a preconfigured IP core called _____, which is a highly configurable microprocessor providing system developers with a unique, powerful, extensible embedded design solution.

         
         
         
         
       

     

    23) The MicroBlaze™ soft processor can be configured as a microcontroller, real-time processor, or application processor. What is the processing speed of the MicroBlaze™ 32-bit RISC processor?

         
         
         
         
       

     

    24) The architecture the Xilinx® 7 series FPGAs has evolved, from a 40nm, Polysilicon/Silicon Oxy-Nitride (Poly/SiON) transistor technology, to a more modern _________, high-k metal gate (HKMG) transistor technology.

         
         
         
         
       

     

    25) The Avnet UltraZed-EV™ SoM is a high-performance System-on-Module (SOM) tailored to embedded vision applications like multimedia, surveillance, and automobile ADASs (Advanced Driver Assistance Systems). It features the Xilinx Zynq UltraScale+ MPSoC, and also has features optimized for multimedia, such as:

         
         
         
         
         
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