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How To Rapidly Design the Power Supply Rails of Xilinx FPGAs & SoCs

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Description

 

 

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Agenda

 

This webinar will demonstrate how Texas Instruments's Power Supply Reference Designs were used to quickly develop the power supply rails needed for Xilinx® Artix®-7, Spartan®-7, and Zynq®-7000 FPGAs & SoCs.

 

Agenda

 

Xilinx – Overview of Cost-Optimized Portfolio

–Overview of the Spartan-6/7, Artix-7, Zynq-7000 Families and Features

–Mobility across Cost-Optimized Device Families

–Applications across the IIoT Edge

–Power Requirements

–XPE Power Estimator Tool

 

TI – Power Supply solutions designed for Xilinx

–Building Blocks (Individual Products at-a-glance)

–Putting it Together – Block Diagrams (Xilinx Power Needs TI Solution)

–How We Put it Together (Example Designs for Rapid Prototyping)

  • TIDA-050000 Reference Design
  • PCB & Prototyping Concept
  • TIDA-01480 Reference Design

 

Additional Information

Presenters

Brian Berner

Brian joined Texas Instruments as an applications engineer in 2011 after earning his bachelor of science and master of science degrees in electrical engineering from Lehigh University. Prior to joining the Integrated Power Management team, Brian worked as an applications engineer supporting customers using the TPS6598x family of USB Type-C and PD Port Controllers while developing technical content to aid in product development.

 

Jayson Bethurem

Jayson is the Product Line Manager for Xilinx’s Cost-Optimized Portfolio, which includes Spartan, Artix, and Zynq-7000 devices. With over 20 years of Xilinx design, technical support, training, and marketing experience, Jayson leads the design of multiple evaluation boards, such as the Spartan-6LX9 Microboard, Zedboard, and MicroZed.

Webinar Recording

Click here to view the recording.

When and Where

  • Start Time:

    Apr 26, 2018 9:00 AM CDT (America/Chicago)
  • End Time:

    Apr 26, 2018 10:00 AM CDT (America/Chicago)
  • Location:

    webex

Event Info

  • Event Type:

    Webinar
  • Event Visibility & Attendance Policy:

    Open

Contact Info

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