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Embedded Vision on Xilinx FPGA

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About

Accelerate real-time high definition video processing designs with Digilent Zybo Z7, a Zynq-7000 AP SoC Platform and Xilinx Vivado HLS


Learn how to use Digilent Zybo Z7 (a Xilinx Zynq SoC FPGA platform), PCAM (5MP camera sensor) and Xilinx Vivado HLx to implement a real-time high definition video processing application. Presenter will demonstrate High Level Synthesis (HLS) design flow, IP core usage, simulation and hardware debugging. The example project is based on both high-level programming language (C++) and hardware description language (VHDL).

 

What The Attendee Will Learn

  • Show how to use High Level Synthesis (HLS) to configure the field programmable gate array (FPGA)
  • Explain how to build the real-time video processing pipelines and Intellectual Property (IP) in the Xilinx computer aided design (CAD) tool.
  • Illustrate the viability of real-time video processing in reconfigurable logic instead of software running on a general-purpose microprocessor.
Presenter

Thomas Kappenman is an enthusiastic Application Engineer with experience in Xilinx FPGA and embedded software development. He has run various workshops in North America and Asia.

Webinar Recording

Click here to view the recording

When and Where

  • Start Time:

    Feb 20, 2019 12:00 PM CDT (America/Chicago)
  • End Time:

    Feb 20, 2019 1:00 PM CDT (America/Chicago)
  • Location:

    webex

Event Info

  • Event Type:

    Webinar
  • Event Visibility & Attendance Policy:

    Open

Contact Info

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