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Getting Started with Xilinx Development Tools

Description

 

Where to start, what tools do what, and how to master Xilinx technology up and through Vitis AI!

 

With technology there is always a new better, unique way of doing things.  With Xilinx, understanding the ramifications of choices early on can save you time, effort and help make your design efforts a great experience!  Unlike other technology, here you create your own CUSTOM logic inside a chip.  Not stuck weaving your code through predefined accelerators, but creating your own accelerators – be it for a custom application or even using AI!

 

Starting with the Avnet port of an AI based “Face Detection” design, we will explore what the end goal is, then learn what the path you could take to get to that same point!

 

 

We will discuss topics such as the Pros/Cons of a Xilinx BDF, how do you start with Vivado, then scripting vs GUI in Vivado, PetaLinux, what is it, how do you use it?  What is all this Vitis stuff I keep hearing about?  What is PYNQ, and what advantages does it provide?

 

What You Will Learn In This Webinar:    

  • Understand how to run the Face Detection demo  
  • What are the different Xilinx Tools
    • What are their outputs, responsibilities, etc.?
    • What do the tools do for and to each other?
    • How do the tools interact with each other?
  • Be able to recreate this demo from scratch
  • Where and why you would want to target your efforts leveraging the Avnet flow
    • See the benefits toward reaching your creation of a solution
  • Where to get more help?
  • Learning the gaps you have, being able to locate more targeted help getting you to your goals faster!

 

The Presenter:

Daniel Rozwood, UltraZed Project Engineer, Avnet

Over my career, having worked in a wide variety fields, from Automotive Safety Test equipment, VoIP, Telco systems, Thermal Imaging Camera, and Satellite / Terrestrial Radio Communications, I have been fortunate enough to have a wide variety of experience allowing me to be in a unique position having seen and worked with everything from gate logic, to FPGA and ASIC design.  The most fun I've had was working with FPGAs where you do not have the pressure of 'cutting an ASIC,' yet you get the fun of designing your OWN chip!  Now, being in Avnet's Products & Emerging Technologies group, I currently work with all of our boards and have a major focus on the UltraZed family.

When and Where

  • Start Time:

    Aug 20, 2020 11:30 AM CDT (America/Chicago)
  • End Time:

    Aug 22, 2020 12:30 PM CDT (America/Chicago)
  • Location:

    On24

Event Info

  • Event Type:

    Webinar
  • Event Visibility & Attendance Policy:

    Open

Contact Info

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