Samsung has taken DRAM to a whole new level, 12.8GB/sec, a great increase over the former LPDDR2. In the process, reducing power consumption by 87%. The increase in data transmission is due to the increase of I/O pins to 512 from the 32 the prior gen memory used. Currently at 1Gb, Samsung plans to release 4Gb modules by 2013. We should see the introduction of this memory in Samsung's future tablets and cell phones. Samsung also hopes to be at the forefront of the DRAM memory demand of a speculated 16.5% boost by 2014. See more about this mem at www.samsung.com/GreenMemory
A complete computer system in 1 cubic millimeter. Onboard is a low power microcontroller, memory, battery, wireless radio, solar cell, and a pressure sensor. This system is meant to be an implantable eye pressure monitor for glaucoma patients. I'm sure a patient would feel this think, despite the size. Think about getting a splinter. Created by three professors from the University of Michigan, Dennis Sylvester, David Blaauw, and David Wentzloff, the project was presented at the International Solid-State Circuits Conference (ISSCC) in San Francisco.
"Our work is unique in the sense that we're thinking about complete systems in which all the components are low-power and fit on the chip. We can collect data, store it and transmit it. The applications for systems of this size are endless," Sylvester said.
Blaauw said, "When you get smaller than hand-held devices, you turn to these monitoring devices." He continued, "The next big challenge is to achieve millimeter-scale systems, which have a host of new applications for monitoring our bodies, our environment and our buildings. Because they're so small, you could manufacture hundreds of thousands on one wafer. There could be 10s to 100s of them per person and it's this per capita increase that fuels the semiconductor industry's growth."
Wentzloff, speaking of the onboard antenna, "This is the first integrated antenna that also serves as its own reference. The radio on our chip doesn't need external tuning. Once you deploy a network of these, they'll automatically align at the same frequency."
The system uses an aggressive sleep mode scheme. It wakes every 15 minutes to take readings at about 5.3 nanowatts. The battery charges in 1.5 hours of sunlight, or 10 hours of indoor lighting. But if it is implanted, how can this happen? It can store up to a week's worth of data.
See more about the team at their personal sites.
David Wentzloff: http://www.eecs.umich.edu/~wentzlof/
David Blaauw: http://blaauw.eecs.umich.edu/people.php?u=professor
Dennis Sylvester: http://www.eecs.umich.edu/~dennis/
The first (sequential) logic circuit has been built using carbon nanotubes. The fast manufacturing process has been developed to print these circuits on TFT with a plastic sub straight resulting in a flexible circuit board. Professors Yutaka Ohno from Nagoya University in Japan and Esko I. Kauppinen explained, nanotube networks contain both metallic and semiconducting nanotubes. While a greater amount of metallic nanotubes increases the transistor’s charge-carrier mobility, it also decreases the on/off ratio. Since both of these characteristics are important for overall transistor performance, the researchers in the new study found a way to optimize both characteristics by fabricating a nanotube network with certain unique properties. For instance, the network’s morphology consists of straight, relatively long (10 micrometers) nanotubes (30% of which are metallic) compared to other nanotube networks. The new network also uses more Y-junctions than X-junctions between nanotubes. Since Y-junctions have a larger junction area than X-junctions, they also have lower junction resistance. Using this nanotube network, the researchers fabricated TFTs that simultaneously demonstrate a high charge-carrier mobility and on/off ratio, offering significantly better performance than previous nanotube-based transistors. After building the transistors, the researchers fabricated an IC capable of sequential logic, the first such circuit based on carbon nanotube transistors to date. This is the first step towards building similar circuits with memory.
Faster mobile device access is close at hand. SanDisk Corporation recently announced its next generation of iNAND and iNAND Ultra embedded flash drives featuring smaller and thinner form factors. Available in packages as small as 11.5mm x 13mm x 1mm, SanDisk's new iNAND and iNAND Ultra e.MMC products support the increasing demand for slimmer and more compact smartphone and tablet designs. The company reduced its iNAND package sizes by using advanced 24nm generation NAND memory chips, which are more compact than previous versions, and reduced its iNAND package heights by using advanced packaging technologies. iNAND EFDs are based on SanDisk's three-bit-per-cell NAND flash technology and iNAND Ultra EFDs are based on SanDisk's two-bit-per-cell NAND flash technology. SanDisk iNAND EFDs come in a variety of storage capacities ranging from 2GB to 64GB for quick integration into handset and other designs that require an e.MMC interface. With managed physical partitions, customizable attributes and advanced power failure immunity, SanDisk iNAND EFDs feature highly reliable boot code and application storage device capabilities in addition to being a mass storage solution. iNAND drives use advanced caching technology that improves system responsiveness, and are designed based on SanDisk's usage analysis capabilities. iNAND EFDs are based on both MLC and X3 technologies. For more information visit: http://www.sandisk.com/about-sandisk/press-room/press-releases/2011/2011-02-14-sandisk-inand-embedded-flash-drives-enable-continued-development-of-powerful,-thin-and-highly-mobile-devices
Pelican, a California startup company, is trying to make a big name for themselves by being a little outside the box. They a promoting a new camera for cellphones that consists of 25 small cameras. The concept is to spread available light over the 25 lenses as opposed to the large one it they are replacing. Image quality is improved by this capturing of more light, and performs extremely well in low light conditions. The final imaged is a collage of the 25 smaller pictures.
Pelican also boasts that the 25 different pictures add an element of 3D depth to any one picture, and gesture capture is the main goal of this feature. Added as a front facing camera could allow us all to use our smartphones without ever touching it. Although they are pushing this tech for portable devices, I would like to see this on my desktop or laptop for similar gesture control. This camera system is also much smaller than what is used now, any phone could use a trim these days.More at http://pelicanimaging.com/pelican-unveils.htm
Engineers and scientists collaborating at Harvard University and the MITRE Corporation have developed and demonstrated the world's first programmable nanoprocessor. “This work represents a quantum jump forward in the complexity and function of circuits built from the bottom up, and thus demonstrates that this bottom-up paradigm, which is distinct from the way commercial circuits are built today, can yield nanoprocessors and other integrated systems of the future,” said Charles M. Lieber, who holds a joint appointment at Harvard's Department of Chemistry and Chemical Biology and School of Engineering and Applied Sciences. The work was enabled by advances in the design and synthesis of nanowire building blocks. These nanowire components now demonstrate the reproducibility needed to build functional electronic circuits, and also do so at a size and material complexity difficult to achieve by traditional top-down approaches. Moreover, the tiled architecture is fully scalable, allowing the assembly of much larger and ever more functional nanoprocessors. An additional feature of the advance is that the circuits in the nanoprocessor operate using very little power, even allowing for their miniscule size, because their component nanowires contain transistor switches that are ‘nonvolatile’. This means that unlike transistors in conventional microcomputer circuits, once the nanowire transistors are programmed, they do not require any additional expenditure of electrical power for maintaining memory. “Because of their very small size and very low power requirements, these new nanoprocessor circuits are building blocks that can control and enable an entirely new class of much smaller, lighter weight electronic sensors and consumer electronics,” said Shamik Das, the lead engineer in MITRE's Nanosystems Group.
Graphene molecular model image.
A new transistor made from graphene, the world's thinnest material, has been developed by a research team at the University of Southampton. The new transistor achieves a record high-switching performance which will make our future electronic devices, such as PDAs and computers, even more functional and high-performance. “Silicon CMOS downscaling is reaching its limits and we need to find a suitable alternative. Other researchers had looked at graphene as a possibility, but found that one of the drawbacks was that graphene's intrinsic physical properties make it difficult to turn off the current flow,” said Dr. Zakaria Moktadir of the Nano research group at the University. Dr. Moktadir discovered that by introducing geometrical singularities (such as sharp bends and corners) in bilayer graphene nanowires, the current could be turned off efficiently. According to Professor Hiroshi Mizuta, Head of the Nano group, this engineering approach has achieved an on/off switching ratio 1,000 times higher than previous attempts. “Enormous effort has been made across the world to pinch off the channel of GFETs electrostatically, but the existing approaches require either the channel width to be much narrower than 10 nanometres or a very high voltage to be applied vertically across bilayer graphene layers. This hasn't achieved an on/off ratio which is high enough, and is not viable for practical use,” he said. Dr Moktadir developed this transistor using the new helium ion beam microscope and a focused gallium ion beam system in the Southampton Nanofabrication Centre, which has some of the best nanofabrication facilities in the world.
OK, so it can’t reach the energies produced at the LHC or Tevatron, but this is still pretty impressive. Engineers at a micro-electro mechanical systems conference that was held recently in Cancun, unveiled this tiny cyclotron device, which can speed argon ions down a 5-millimeter accelerator track. Their chip-size cyclotron can guide argon ions with around 1.5 kiloelectronvolts of energy down a 5-millimeter accelerating track before whipping them around a 90-degree turn. The system boosts the ions’ energy by 30 electronvolts. That’s not very much energy, but unlike its larger cousins, this accelerator has no need for bulky magnets and instead uses an electric field set up between parallel electrode guide rails to accelerate and steer its particle beam. Yue Shi, an electrical and computer engineering graduate student at Cornell University, constructed three versions of the accelerator; two on silicon-on-insulator (SOI) chips and one on a printed circuit board. Each had a straight, segmented acceleration track and either a 1-, 2-, or 4-mm turning radius. To test the design, she fired a stream of argon ions with around 1.5 keV of energy from a commercial ion source into each chip’s tracks. Electric fields between four segments in each chip’s acceleration track gave the ions a kick before they raced into the turn. Then another electric potential between two electrode curbs pulled ions around the bend. Only those ions with just the right amount of energy made it through. So, by detecting ions at the finish line, Shi confirmed that they truly got a boost. A few hurdles remain, including a more efficient way to grab ions from the 75-micrometer-wide beam. Lots of ions are lost in the transition, Shi said. But the device at least proves the concept that you don’t need humongous frozen magnets and cavernous spaces to speed up some particles.
Recently Marvell announced the world’s first ‘ultra-low power, ultra-high performance’ 1.5 GHz three-core processor that is the first to feature 3D graphics performance with quad unified shaders for 200 million triangles per second delivered on mobile devices. According to Marvell, the Armada 628 can deliver dual stream 1080p 3D video and 3D graphics performance with quad unified shaders for 200 million triangles per second delivered on ultra-low-power, long battery life smartphones and tablets. The Armada 628 is also the first to incorporate a System-on-a-Chip (SoC) design with three ARM cores and six additional processing engines, totaling nine dedicated core functions. An Armada-equipped smartphone would be able to play 10 hours straight of 1080p HD video or 140 hours of music on a single charge. Some of the key features of the tri-core processor include: Up to 1.5 GHz for the two main cores and 624 MHz for the third low power core. 1 MB System Level 2 Cache. 1080p dual stream 3D video applications (30 FPS, multi-format). Ability to project images on multiple simultaneous displays: 2 LCD’s, 1 HDMI, 1 EPD controller. Peripherals supports: USB 3.0 Superspeed Client, MIPI CSI, MIPI DSI, HDMI with integrated PHY, UniPro, Slimbus, SPMI. The Armada 628 is the first mobile CPU to offer USB 3.0. The CPU is compatible with RIM OS, Android, Linux, Windows Mobile, and full Adobe Flash. According to Marvell the CPU is currently available for sampling to customers but there is no word yet on when we can expect it to be incorporated into smartphones or tablets in the U.S. market.
Gallium nitride material holds promise for emerging high-power devices that are more energy efficient than existing technologies, but these GaN devices traditionally break down when exposed to high voltages. Now researchers at North Carolina State University have solved the problem, introducing a buffer that allows the GaN devices to handle 10 times greater power. Previous research into developing high power GaN devices ran into obstacles, because large electric fields were created at specific points on the devices’ edge when high voltages were applied, effectively destroying the devices. NC State researchers have addressed the problem by implanting a buffer made of the element argon at the edges of GaN devices. The buffer spreads out the electric field, allowing the device to handle much higher voltages. The researchers tested the new technique on Schottky diodes and found that the argon implant allowed the GaN diodes to handle almost seven times higher voltages. The diodes that did not have the argon implant broke down when exposed to approximately 250 volts. The diodes with the argon implant could handle up to 1,650 volts before breaking down. “By improving the breakdown voltage from 250 volts to 1,650 volts, we can reduce the electrical resistance of these devices a hundredfold. That reduction in resistance means that these devices can handle ten times as much power,” said Dr. Jay Baliga, Distinguished University Professor of Electrical and Computer Engineering at NC State.