Flash is the storage technology used inside the thinnest, lightest laptops and nearly every cellphone, tablet and mobile device. With users of these devices constantly demanding increasing functionality the amount of NAND flash memory needed has grown accordingly. Traditional planar NAND flash memory, however, is nearing its practical scaling limits, posing significant challenges for the memory industry.

Happily, once again technology is coming to the rescue. Last week, coincidentally on the same day and in separate announcements, Micron/Intel and Toshiba/SanDisk announced the availability of flash cells that are vertically stacked in multiple layers, known as 3D NAND technology. Products using 3D NAND are expected to be able to keep flash storage solutions on track for continued performance gains and cost savings, driving more widespread use of flash storage. This is important because solid state drives (SSDs) employing flash have had a significant impact on computing, but although prices have dropped, the capacities still lag far behind those of traditional magnetic hard drives.

The 3D NAND technology jointly developed by Intel and Micron (who have partnered to make 3D NAND Flash since the formation of their joint venture in 2006) stacks 32 layers of data storage cells vertically.  It uses floating gate cells a universally utilized design refined through years of high-volume planar flash manufacturing and enables what the companies say is the highest-density flash device ever developed—three times higher capacity than other NAND die in production. The immediate result will be seen in gum stick-sized SSDs with more than 3.5 terabytes (TB) of storage and standard 2.5-inch SSDs with greater than 10TB capacity.

Because capacity is achieved by stacking cells vertically, the individual cell dimensions can be considerably larger. This is expected to increase both performance and endurance and make the technology well-suited for data center storage. What is more, in the Intel/Micron design a new sleep modes enable low-power use by cutting power to inactive NAND die (even when other die in the same package are active), dropping power consumption significantly in standby mode.

The 256Gb multilevel cell version of 3D NAND is sampling today with select partners, and the 384Gb triple-level cell design will begin sampling later this spring.

Toshiba's 3D NAND structure (which will also appear under the SanDisk label since the two have a NAND joint venture) is called BiCS, for Bit Cost Scaling., Toshiba’s new flash memory stores two bits of data per transistor, meaning it's a multi-level cell (MLC) flash chip. It can store 128Gbits (16GB) per chip. Toshiba said its 48-layer stacking process enhances the reliability of write/erase endurance, boosts write speed, and is suited for use in diverse applications, but primarily solid-state drives (SSDs).Sample shipments of products using the new process technology began last Thursday. Toshiba is preparing for mass production in their new Fab2 at Yokkaichi Operations,


For its part last year Samsung became the first company to announce it was mass-producing 3D flash chips, which it calls V-NAND. Samsung’s chips stack 32-layers of transistors. V-NAND crams in 3-bits per transistor in what the industry refers to as triple-level cell (TLC) NAND. Because Samsung uses TLC memory, its chips are said to be able to store as much as Toshiba's 48-layer 3D NAND -- 128Gbits or 16GB.

Going forward these and subsequent 3D NAND announcement could mean SSDs will have the density to see it eclipsing hard drives as the primary storage medium in devices meeting most people’s needs.