This post is a preparation for my attempt to generate VGA with a XuLA2 FPGA board.

I'm generating an image file that I can upload to the board's SDRAM.

The FPGA will read it from the RAM and convert it into a VGA image.

 

The example project for the VGA plug-in for the XuLA has an example image.

The latest loader tool for the board (xsload 0.1.31) doesn't support the format of that file.

There's an older version of the loader that supports it but doesn't want to run on my pc.

Not to worry. In this post I convert the image to a supported load format: Intel HEX.

 

The XuLA FPGA VGA project and the image file are available on the Xess github:
https://github.com/xesscorp/StickIt/tree/master/modules/Vga/FPGA/PixelVgaTest

 

 

Preparation - Generate Binary Image

 

The example image is in a proprietary format. Below are a few lines as exampe

 

+ 10 00000000 7F 2C 7F 2C 7F 2C 7F 2C 7F 2C 7F 2C 7F 2C 7F 2C
+ 10 00000010 7F 2C 7F 2C 7F 2C 7F 2C 7F 2C 7F 2C 7F 2C 7F 2C
+ 10 00000020 7F 2C 7F 2C 7F 2C 7F 2C 7F 2C 7F 2C 7F 2C 7F 2C

 

10 stands for 0x10 data elements (16 bytes), the second field is the address in ram it has to go, then there's the 16 bytes payload that represent a few pixels of the image.

 

The easiest path from that file to the somewhat elaborate Intel HEX format is to convert this into a binary file that only contains the pixel data.

There are existing utilities that can convert bin to Intel HEX.

 

I made a small c++ utility to grab those pixel bytes from that example and write it to a binary file.

The fixed filenames, not using a data buffer and the way I did the ascii-hex to number conversion show that I'm in a holiday mood.

 

//============================================================================
// Name        : xess_file_converter.cpp
// Author      : Jan Cumps
// Version     :
// Copyright   : copyleft
// Description : Convert XES images to BIN files
//============================================================================


#include <iostream>
#include <fstream>
#include <string>
#include <sstream>


using namespace std;


int main() {


    ifstream inFile("D:\\users\\jancu\\Documents\\elektronica\\xess\\master\\StickIt\\modules\\Vga\\FPGA\\PixelVgaTest\\img_800x600.xes");
    ofstream outFile ("D:\\users\\jancu\\Documents\\elektronica\\xess\\master\\StickIt\\modules\\Vga\\FPGA\\PixelVgaTest\\img_800x600.bin", ios::out | ios::binary | ios::trunc);
    string subs;
    uint32_t uToken = 0U;
    char c;
    uint16_t uVal;

    string line;
    while (getline(inFile, line))
    {
    uToken = 0U;
        istringstream iss(line);
        while (iss >> subs) {
        if (uToken > 2) {
        stringstream ss;


        ss << hex << uppercase << subs;
            ss >> uVal;
            c = uVal;
            outFile.write(&c, 1);
        }
        uToken++;
         }
    }


    outFile.close();
    inFile.close();


return 0;
}

 

The result is a file that has 800 * 600 * 2 bytes. Checked with the file size:

 

 

 

Generate Intel HEX File

 

The sourceforge.net srecord project supports converting binary files into Intel HEX format.

 

 

srec_cat img_800x600.bin -binary -o img_800x600.hex -intel

 

The output format generated by the utility is as below:

 

:020000040000FA
:200000007F2C7F2C7F2C7F2C7F2C7F2C7F2C7F2C7F2C7F2C7F2C7F2C7F2C7F2C7F2C7F2C30
:200020007F2C7F2C7F2C7F2C7F2C7F2C7F2C7F2C7F2C7F2C7F2C7F2C7F2C7F2C7F2C7F2C10
...
:20A5C00000000000000000000000000000000000000000000000000000000000000000007B
:20A5E00000000000000000000000000000000000000000000000000000000000000000005B
:00000001FF

 

 

The xsload utility seems (I can't prove it yet because I don't have a VGA cable) to accept the format and load the file to RAM:

 

xsload  --ram img_800x600.hex

 

output

 

Success: Data in None downloaded to RAM on XuLA2-LX25!

 

 

Success?

 

I will know that once I connect the kit to a TV. I've checked the VGA output on an oscilloscope.

I built and loaded the Xess VHDL example (I'll explain the steps in a future blog) and loaded the bitstream:

 

xsload --fpga pixelvgatest.bit

 

output

 

Success: Bitstream in pixelvgatest.bit downloaded to FPGA on XuLA2-LX25!

 

 

Yellow: HSYNC

Cyan: VSYNC

Magenta: one of the video signals

 

 

I hope to be able to show a TV screen with image soon. Hang on ...

 

XuLA2 FPGA - First Impressions of the Development Tools
XuLA2 FPGA - SD Card Read and Write
XuLA2 FPGA - Rotary Encoder and VHDL
XuLA2 FPGA - PWM with Dead Band in VHDL
XuLA2 FPGA - Up the Clock
XuLA2 FPGA - Utility to Generate Pin Assignments