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2017
Here is the new release 0.0r of XXICC.  I've been horrifically busy with work and family obligations over the last two years so I wasn't able to keep up with XXICC.  Also, 0.0r is a major release since it adds integer nets and operators to GCHD, and can now program Lattice iCE40 FPGAs using the open-source IceStorm tools.  So there was lots of testing and documentation updates.   XXICC (21st Century Co-design) is a not-for-profit research project which attempts to bring digi ...
Ive been recently using an M74HC590 binary counter to capture some data from an opto-encoder and thought that since I'd modelled a basic binary counter into the FPGA, why don't I go the whole hog and model this real world component into it too and make a final blog post in this series.   Here's the front page and the pinout  in the datasheet for the M74HC590 that I'll be modelling:                   So we know what the inputs and output ...
So far the DE0-NANO P0082 development board and the associated user guides have given me a basic overview on how to develop with FPGA's and introduced me to a simple Verilog HDL file. To move forwards in FPGA development I would need to learn more about Verilog HDL and while Terasic have done a great job creating resources that teaches the basics of development I wouldn't expect them to provide me with a full Verilog HDL learning resource and so I looked elsewhere.   The first resource I ...

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