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Recently I discovered a clever way in MATLAB to interact with my HDL IP cores in situ, running in the programmable logic. Yes, of course, there are many ways to probe logic in an FPGA, but this one is particularly helpful when I need to analyze bits that represents sampled signals.   A few benefits of this method: Simple setup – ARM subsystem is not involved Pass buffers of data to/from MATLAB workspace Post-capture analysis natively in MATLAB (no need to transfer vector files) &# ...

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