Skip navigation

FPGA Group

June 2019 Next month
The DSP58 Primitive   Xilinx has recently announced a new 7nm FPGA family called Versal. Devices in this family will have an improved version of the UltraScale/UltraScale+ DSP48E2 primitive we just studied in the last posts. The new Versal primitive is called DSP58 and there are numerous improvements compared to the earlier DSP48.   First of all, the signed multiplier, which was 27x18 in DSP48 is now 27x24 and the 48-bit post-adder/accumulator is 58 bits, which is where the name of ...
The DSP48 Primitive - Complex multipliers   Traditionally a complex multiplication can be decomposed into four real multiplications and two additions:      x+i·y=(a+i·b)(c+i·s)=(a·c−b·s)+i·(a·s+b·c) where     i=√−1   This maps well into four DSP48s, including the two additions, which can use the post-adders and the DSP48 P cascades. The latency of a fully pipelined DSP48 implementation is fo ...

Filter Blog

By date: By tag: