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Hi Everyone,   Avnet has just released the PetaLinux 2019.2 BSP for the Ultra96-V2 board:   This BSP includes working WiFi and access point to ease configuration for connecting to the user's WLAN.  Instructions for this can be found in the Ultra96-V2 Getting Started Guide.   This BSP also includes the logic pieces in the programmable logic (PL) fabric to allow it to be used as the basis for a Xilinx Vitis platform to allow users to create custom accelerators or experiment ...
On Feb 18th, 2020, Avnet announced the availability of an Industrial-temperature grade Ultra96-V2. https:/
ews.avnet.com/press-release/avnet/avnet-upgrades-ultra96-v2-single-board-computer-industrial-temperature   This was something we hinted at last year when Ultra96-V2 was first released. This was mentioned again in ctammann's blog that discussed a new heatsink design for Ultra96-V2: Thermal relief is critical - design example around Ultra96-V2   I wanted to share a few more det ...
dimiterk

Porting PYQN to ZC702

Posted by dimiterk Feb 11, 2020
In this project we will port the PYNQ framework to the ZC702 development board.  Introduction   The ZC702 is an official development board from Xilinx. This board sports a ZC7020 ZYNQ FPGA SoC. It comes with a number of peripherals including HDMI, CAN Bus, UART, embedded Digilent JTAG Programmer, Ethernet , SD card, USB host , I2C bus expander and a number of SMBUS enabled PMIC for monitoring the SoC rails.      PYNQ is a project by Xilinx that brings Python le ...

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