I'm going to borrow heavily from my colleague Tom Curran and his excellent HDL howto blog (Avnet HDL git HOWTO). I highly recommend reading through that blog before continuing. I will modify it as needed to help you build the hardware design for the 96Boards ON Semiconductor Dual Camera Mezzanine design using Ultra96-V2. I will preface this blog post by saying I have been a power and hardware designer most of my career. In an effort to diversify and help out on more projects I've decided to learn more about Xilinx tools, virtual boxes, Linux, etc. It's been a challenge to say the least, but I have to say the guys on my team have put together some incredible materials as far as guides and instructions to get you started. I have attached the install procedure I followed to setup a virtual machine with the proper tools in order to create this build. If you do not have Vivado 2020.1 installed on a Linux machine, please follow the virtual box install instructions before continuing.

 

If you've gotten through the pain of installing all the tools, hopefully our "stats" align:

 

  • Ubuntu v18.04 LTS 64-bit host OS
  • PetaLinux tools installed
  • Vivado 2020.1
  • At least 100GB of free disk space

 

A couple other notes about this build. There is an IP block inside this design that requires a v_osd IP license. This IP core license is included in the SDSoC license that ships with Ultra96-V2 so anyone working with this design should have access to it. Unfortunately if you do not have this license then you will not be able to successfully build this design. There are plans to replace this IP block, but there is no timeline in place so I would expect months not weeks. Bottom line, find your SDSoC license that came with Ultra96-V2.

 

If you need help with licensing, please refer to the attached getting started guide for Ultra96-V2. Page 30 starts the instructions on setting up your license.

 

It took quite a bit of time to convert this design over from a locally built design to work with our HDL structure on GitHub. Huge thanks to Dan Rozwood, Tom Curran and Kevin Keryk for helping me do the conversion. Now that the conversion has been done, the design can easily be rebuilt from github and future updates should not break the design as it will be maintained along with the rest of the library. Below you will find a series of commands that will build this hardware design for you from a terminal window. I have highlighted the commands that need to be entered:

 

# 
# Setup Xilinx environment
# It is recommended to also add these lines to the end of your ~/.bashrc file
#
$ TOOLS_VER=2020.1
$ source /tools/Xilinx/Vivado/$TOOLS_VER/settings64.sh
$ source /tools/petalinuxv2020.1-final/settings.sh

#
# Clone the repositories
#

$ cd ~
$ mkdir -p git/avnet
$ cd git/avnet/
$ git clone https://github.com/Avnet/bdf.git
$ git clone https://github.com/Avnet/hdl.git
$ git clone https://github.com/Avnet/petalinux.git
$ cd bdf
$ git checkout master

$ cd ../petalinux
$ git checkout 2020.1
$ cd ../hdl
$ git checkout 2020.1

#
# Run the Vivado build script for the Ultra96-V2 dualcam design
#

$ cd Scripts
$ vivado -mode batch -source ./make_ultra96v2_dualcam.tcl

 

When the design is done building (keep in mind it takes a while, while in hours not minutes, note the time shown in the capture below) you will see this:

 

You can then open Vivado and navigate to the project, which should be here:

 

You can then navigate the project, connect to your target hardware and program if you'd like (be sure the boot mode is set to JTAG) or check out the block design. You're block design should look something like this:

 

You'll still need to build petalinux on top of this to have the full OOB image. When that design has been fully validated in our Github process I will post a followup blog outlining the complete build.

 

Ultra96-V2Ultra96-V2