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The Single Rate Half-Band FIR Decimator   A decimating filter will reduce the sample rate of a signal, while preventing aliasing. Decimation by a factor of 2x is achieved by simply throwing out every second input sample. For this to work the input data must be first filtered and the upper half of the frequency spectrum attenuated to a point where it will not affect the desired signal after decimation. The half-band FIR is ideally suited for this task. We start again with the same single r ...
The Single Rate Half-Band FIR Interpolator   In the previous post we looked at the single rate half-band FIR, a particular type of odd-symmetric FIR, where almost half of the filter coefficients are zero. Not computing multiplications with these zero coefficients and also taking advantage of the symmetry reduces the number of multiplications per output sample by a factor of 4x.  From a mathematical point of view, that filter looked like this, for the particular case where the filter ...
We are currently working on PetaLinux 2020.2 BSPs for the Avnet MicroZed, PicoZed, and UltraZed SOMs and MiniZed and Ultra96-V2 SBCs   As part of these BSP updates we are also taking the time to make some much needed and overdue changes to the HDL, PetaLinux, and Vitis git repositories: Remove old projects that are no longer supported Change naming of projects and build scripts to be consistent within each repo and across all repos Lower case script file names and folder names Fix inco ...
As a follow up to the blog I posted on building the hardware design for the out of box image for the ON Semiconductor Dual Camera Mezzanine card, here are the instructions to complete the build with the Petalinux project. The original blog can be found here - Ultra96-V2 ON Semiconductor Dual Camera Mezzanine hardware build instructions   The process of porting the full design over to our Github repo has now been completed. Below I've pasted the instructions to build the full design includ ...
HI all,   As I was working through updates for the 2020.2 release, I thought it might be useful to release some information about how much space you need to build. I worked through a chart of information and hope you can pick through the data and create a "final" size of information that you might need for your situation. This way, you won't have to install a 1TB Virtual Machine if you do not need it! Please note that this information is good as of what is on the development 2020.2 bra ...
Arty S7 Accelerometer-based pointer  In a little bit more than a year ago I began experimenting with my first FPGA, the Digilent CMOD S7. FPGAs are quite flexible and can be used as programmable logic devices, but also as microcontrollers, since the programmable logic can be used to build a microcontroller. The programmable logic is flexible enough to allow you to design your own microcontroller, but this is would be very time consuming. There are many microcontroller architectures that ...

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