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It recently came to our attention at Avnet that PetaLinux QEMU boot was broken for our MicroZed SOMs, and possibly also broken for PicoZed, UltraZed, MiniZed, and Ultra96-V2.  After spending some time to dive in and debug this problem we discovered that QEMU was failing on the node in the device tree for the Ethernet PHY, specifically the “compatible =" string.  For example, the fix to get QEMU working for MicroZed was as simple as changing the lower case ‘88e1510’ to ...
Note: This is one alternative for adding board definitions to the Xilinx tools the other option is documented here. Xilinx BoardStore to Automate Vivado Board Definitions for Avnet Boards   For anyone just getting started with Xilinx Vivado, a good place to start is UG895 Vivado Design Suite User GuideSystem-Level Design Entry https://www.xilinx.com/support/documentation/sw_manuals/xilinx2020_2/ug895-vivado-system-level-design-entry.pdf   It is 128 pages long, and sometimes it's eas ...
Polyphase Decimators   The Polyphase Decimator FIR is the dual structure of the Polyphase Interpolator. The basic idea is that you can reduce the sample rate of a signal by a factor of M if you keep only one out of every M samples. This only works if the signal being decimated has a limited bandwidth, otherwise we will get aliasing artifacts. This is achieved by low-pass filtering the input signal before decimation, with a prototype filter which is very similar to the one we encountered in ...
Polyphase Interpolators   In the previous post we have looked at and important class of FIR filters, namely Polyphase architectures, which are extensively used for changing the sample rate of a signal by and integer factor, a process called interpolation or decimation. We have looked at the particular case where the system clock rate is equal to the lower sample rate, that is the input rate for an interpolator and the output rate for a decimator. In that case, a Polyphase FIR that interpol ...
We have now released the 2020.1 BSP for both Ultra96-V2 and UltraZed EV with the PMIC programming utility built in! For the purposes of this blog, I am going to provide instruction on how to simply download the 2020.1 BSP as an SDcard image. You will then need to use a program such as Etcher to create the SDcard from the image.   First download the appropriate image here - http://avnet.me/zedsupport Click on the 2020.1 folder, then go to the Vitis_PreBuilt_Example folder. From here select ...
Polyphase FIRs   The half-band FIR is just one particular case of a larger class of FIR filter implementations called polyphase structures. The basic idea is to split the sum of products we need to compute for every filter output sample into multiple sub-sums or phases, using the associativity property of addition. From a mathematical point of view, this would be expressed by the following formula: What this means is that we have M partial sums which are computed separately and t ...
Hi all,   I was working through the update to the 2020.2 version of the Xilinx and realized there was a few small awesome things that we have included that might be of interest to the greater community!  I also think that you could translate this information into just about any system out there.  While I do not use other systems, I would think they have similar features / capabilities as I am going to discuss.   In this blog, I want to talk about tweaking performance in Viv ...

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