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The goal of this blog series is to master the Xilinx Zynq. I'm using the PWM design of my previous post and switch to AXI memory map interface between ARM and FPGA. I learned this from beacon_dave 's PYNQ-Z2 Workshop - AXI GPIO post.   ARM/Linux to FPGA interface: from GPIO to AXI memory mapped register  in the previous post, I made a PWM generator in VHDL for the Zynq. I used the ARM EMIO GPIO bus as the interface between ARM and FPGA fabric. This is a 64 bit bus. I used 8 bits ...

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