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Build a big multiplexer by reusing small multiplexers. FPGA designs are (re)usable as components. In this post I'm showing that you can make a 4-input multiplexer by combining several 2-input multiplexers. A 2-input multiplexer is a simple digital building block. The 4-input multiplexer shown here is made out of 3 of these 2-input blocks.     A multiplexer is a device that allows you to select one input and send that to the output. You can compare it to the source selector of you ...
You can interrupt the Zynq ARM side with a signal coming out of the FPGA part of the chip. In this post, I test this. The FPGA part has a few blocks that will generate interrupts. In a Jupyter notebook, I'll try to show that they are detected by the processors and OS.   In this article, I try out an approach discussed on the Pynq forum. It doesn't use VHDL or Verilog. The interrupts are generated from 2 Xilinx Timer IP blocks. But they could as well be generated from your own IP (E.g.: ...
Introduction This blog post provides details on how to build and execute the new 2020.2 design for the Ultra96-V2 development board with Dual-Camera Mezzanine.     Ultra96-V2 Dual Camera Photos Ultra96-V2 with Dual Camera Mezzanine Ultra96-V2 with Dual Camera Mezzanine Dual Camera Mezzanine   Design Overview The following block diagram illustrates the 2020.2 version of the hardware design. The following images capture the resource utilization of the design.   ...

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