
Choose a layout and drag widgets onto your Overview Page to customize it. Widgets placed on the page below can be configured by selecting the symbol.
Loading...
Learn how FPGAs are used to accelerate performance in compute-intensive, network, storage, and sensor-processing applications.
The FPGA Group features Field Programmable Gate Arrays (FPGAs) and how they are ideal for implementing complex functionality, and providing flexibility in product development.
用FPGA替代DSP实现即时图像和视频处理 10 years ago | by Flush |
![]() |
|
基于VHDL的线性分组码编译码器设计 10 years ago | by Flush |
![]() |
|
可编程系统芯片(PSC)在智能电池管理中的应用 10 years ago | by Flush |
![]() |
|
FPGA设计者的5项基本功 10 years ago | by Flush |
![]() |
|
FPGA在语音存储与回放系统中的应用 10 years ago | by Flush |
![]() |
We are brainstorming webinars that we would like to offer this year. LIDAR technology seems to be on everyone's minds lately. We wanted to get your feedback on some of the possible webinars we may like to offer on this technology.
Poll question: From the selections below, which webinar title interests you the most?
by fpgaguru in FPGA Group on Mar 1, 2021
Taking advantage of coefficient symmetry in Polyphase FIRs We have seen in previous posts that when the FIR coefficients are symmetric, we can use a DSP48 feature called a pre-adder and more...
by narrucmot
in
FPGA Group on Feb 25, 2021
It recently came to our attention at Avnet that PetaLinux QEMU boot was broken for our MicroZed SOMs, and possibly also broken for PicoZed, UltraZed, MiniZed, and Ultra96-V2. After spending more...
by bhfletcher
in
FPGA Group on Feb 24, 2021
For anyone just getting started with Xilinx Vivado, a good place to start is UG895 Vivado Design Suite User GuideSystem-Level Design Entry more...
by fpgaguru in FPGA Group on Feb 23, 2021
Polyphase Decimators The Polyphase Decimator FIR is the dual structure of the Polyphase Interpolator. The basic idea is that you can reduce the sample rate of a signal by a factor of M if you more...
by fpgaguru in FPGA Group on Feb 15, 2021
Polyphase Interpolators In the previous post we have looked at and important class of FIR filters, namely Polyphase architectures, which are extensively used for changing the sample rate of a more...
by ctammann
in
FPGA Group on Feb 9, 2021
We have now released the 2020.1 BSP for both Ultra96-V2 and UltraZed EV with the PMIC programming utility built in! For the purposes of this blog, I am going to provide instruction on how to simply more...
by fpgaguru in FPGA Group on Feb 9, 2021
Polyphase FIRs The half-band FIR is just one particular case of a larger class of FIR filter implementations called polyphase structures. The basic idea is to split the sum of products we more...
Subject | Author | ||
---|---|---|---|
![]() |
Episode 388: FPGA MIDI Music Synthesizer 2 years ago in Project Videos |
by pchan
![]() |
![]() |
![]() |
Episode 353: Program Your Own FPGA Video Game 2 years ago in Project Videos |
by tariq.ahmad
![]() |
![]() |
![]() |
Episode 371: FPGA "Game Genie" for Atari 2600 2 years ago in Project Videos |
by pchan
![]() |
![]() |
Subject | Author | ||
---|---|---|---|
![]() |
The Art of FPGA Design - Post 3 2 years ago in FPGA Group | by fpgaguru |
![]() |
![]() |
The Art of FPGA Design - Post 8 2 years ago in FPGA Group | by fpgaguru |
![]() |
![]() |
The Art of FPGA Design - Post 1 2 years ago in FPGA Group | by fpgaguru |
![]() |
![]() |
The Art of FPGA Design - Post 9 2 years ago in FPGA Group | by fpgaguru |
![]() |
Subject | Author | ||
---|---|---|---|
![]() |
Programmable Devices II: Programmable SoCs 1 month ago in Essentials |
by pchan
![]() |
![]() |
![]() |
Programmable Devices I: Programmable Logic 1 month ago in Essentials |
by pchan
![]() |
![]() |
![]() |
Programmable Devices III: FPGA / Programmable SoC Programming Languages 1 month ago in Essentials |
by pchan
![]() |
![]() |
Subject | Author | ||
---|---|---|---|
![]() |
Entering The World Of FPGA's with a DEO-NANO P0082 - Part 5 (modelling a M74HC590) 4 years ago in FPGA Group |
by lucie tozer
![]() |
![]() |
![]() |
Entering The World Of FPGA's with a DEO-NANO P0082 - Part 4 (moving on) 4 years ago in FPGA Group |
by lucie tozer
![]() |
![]() |
![]() |
Entering The World Of FPGA's with a DEO-NANO P0082 - Part 1 4 years ago in FPGA Group |
by lucie tozer
![]() |
![]() |
![]() |
Entering The World Of FPGA's with a DEO-NANO P0082 - Part 3 4 years ago in FPGA Group |
by lucie tozer
![]() |
![]() |
![]() |
Entering The World Of FPGA's with a DEO-NANO P0082 - Part 2 4 years ago in FPGA Group |
by lucie tozer
![]() |
![]() |
Subject | Author | ||
---|---|---|---|
![]() |
XuLA2 FPGA - SD Card Read and Write 3 years ago in FPGA Group | by Jan Cumps |
![]() |
![]() |
XuLA2 FPGA - Up the Clock 3 years ago in FPGA Group | by Jan Cumps |
![]() |
![]() |
XuLA2 FPGA - First Impressions of the Development Tools 3 years ago in FPGA Group | by Jan Cumps |
![]() |
![]() |
XuLA2 FPGA - PWM with Dead Band in VHDL 3 years ago in FPGA Group | by Jan Cumps |
![]() |
![]() |
XuLA2 FPGA - Utility to Generate Pin Assignments 3 years ago in FPGA Group | by Jan Cumps |
![]() |
![]() |
XuLA2 FPGA - Rotary Encoder and VHDL 4 years ago in FPGA Group | by Jan Cumps |
![]() |
Artix-7 FPGA
Arty Z7 Dev Board
Lark Board - Altera Cyclone V SoC Evaluation Kit
LOGI-BONE-2 FPGA Board
LOGI-EDU-2