This Battery Simulator project is intended to provide a way of testing small devices such as wireless sensor nodes that usually require a battery power source. For more details, check out part 1 by clicking here. After you've finished reading, click here for part 3.
This part 2 discusses some of the PCB layout (more details once the board has arrived and been tested!). Note: The board was not designed for production, and PCB layout engineers will take many different decisions compared to the design here. However the general layout is described here for those interested in following the project (layout and schematics will be published so others can build it too).
PCB Layout Decisions
The approximate functional areas are shown below, and the paths (and returns for power planes). The highest frequency signals will be around the ADC, and it was kept furthest away from the remainder circuitry.
The path for the high current portion of the design is on the left side. There are multiple power and ground planes, all returning to a common point, which is not always feasible (and not always necessary) but was possible in this case. The aim is to always follow the high current signals and avoid supplying or referencing off them from different points, because whenever high current is flowing, there will be a voltage drop across different points on the same path (since V=IR and all traces have a certain resistance) which may affect any circuitry sensitive to voltage.
Often there are many other objectives too, such as avoiding capacitive or inductive coupling or RF pickup or thermal effects from having a significant influence, depending on the types of circuits on the board. Some things can be solved at the component level (e.g. matched transistors, or shielded inductors) whereas others need board-level or entire assembly-level support (e.g. through distance between components or traces or planes, and shielding of circuitry).
Bypass capacitors are essential to provide low impedance to AC signals. A good general rule is to always follow the datasheet, otherwise if not specified, use a 100nF ceramic capacitor for circuits operating at frequencies up to a few tens of MHz. Any higher, and a 1nF capacitor should be used. In the several hundred MHz range, a 100pF capacitor should be used. The reason for these values is that capacitor inductive component becomes significant and limits the range that capacitors can be used at. The values above are rules of thumb. For higher frequencies, the datasheets should be consulted.
Zero-ohm resistors in line with signals are a great way of isolating circuitry, especially for a first PCB where you may want to isolate bits of circuitry.
To start the layout, the first step was to approximately sketch the sub-circuits, so that they could be moved around to plan it (like planning the layout of a room):
The final layout (shown earlier) looks different from the one above, but some parts of the circuit can be seen to be in similar positions to this initial thought.
Copper areas were created using ‘polygon’ elements in EAGLE. It is worth spending time learning how to use them because they are essential for power planes.
Via holes were kept large to allow low-cost PCB manufacturers to be used, which meant that in a few places they could not be avoided in the pad area, and were placed as far out from the center of pads as possible. This is not usually an issue for hand-soldered boards.
Regarding trace width, if current is expected to be high or resistance will have an effect on a particular signal then thick or short traces are needed; for digital signals often thinner traces are better to reduce capacitive coupling (I avoid the absolute minimum that the manufacturer supports, and choose a width perhaps 1/3 higher), and route them away from analog portions.
Another consideration is how the board will be cased; for flexibility there are holes with different spacings so that the board should hopefully fit several different enclosures. I chose 50, 85 and 90mm spacings, and also cut off all corners. Lots of space is needed around screw holes, so it is good to dedicate this space early before spending time routing signals.
For text on the PCB, a good size is 1.27mm height; this is very readable from a distance yet small enough to fit in most places. If this size is not possible then I reduce to 0.9mm height which is still readable but small. Smaller that this is possible too, but I avoid going further than that.
Space may be needed for labels, and 30mm or more is not unusual. Logos were created by using EAGLE’s import-bmp program (also known as a user language program or ULP in EAGLE terminology).
EAGLE’s ‘Smash’ option is used to separate labels from the component packages, so that text can be moved around. I chose to only have the component references on the silkscreen, and not the component values.
Since there may be multiple copies of this project floating around the lab, it was decided to electronically label each one, either with an electronic serial number or programmable memory. This makes it possible to retain history for each board such as calibration data or board revision numbering so that the same software can be used with multiple boards. I used serial EEPROM.
Post 3 will follow hopefully early in the new year!
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