I was excited to be chosen as one of the additional RoadTesters (Beep Beep - or is that the RoadRunner) for the Digilent BASYS3 FPGA Introduction PCB. I proposed to design and implement my own microprocessor based on the Reduced Instruction Set Computer (RISC) philosophy. This philosophy can be a bit confusing as most people would consider this to mean a smaller number of instructions, whereas the reality is that it means each instruction is simplified. One of the effects of this is that the total number of instructions can be significantly increased. To try and make my approach a bit easier to understand I have decided to call it a simplified instruction set computer (SISC).  Another oddity is that it isn't a computer it is actually a microprocessor but as the memory and I/O will be integrated into the same FPGA it doesn't seem worth quibbling over. Just for completeness, the original design of microprocessors such as the Intel 80x86 families can be classed as complex instruction set computers (CISC). The essential essence of the RISC philosophy is to maximise the speed at which machine level instructions are executed without bothering to attempt any minimisation of the hardware used, as nowadays silicon is cheap. Originally, Silicon was expensive so CISC devices were designed to be as fast as possible but also use as few registers/gates as possible. The approach I will be taking in this design makes absolutely no attempt to minimise hardware (registers and gates) but instead aims for simplicity with the intention of achieving higher instruction execution rates. The FPGA used in this PCB is an Artix 7 XC7A35T which has approximately 4000 registers which is not that many and in all likelihood not all of them will be accessible anyway, due to routing constraints. The XC7A35T does contain other elements in addition to the registers, such as DSP (Digital Signal Processing) slices, memory, I/O (Input/Output) but my initial approach will not be using any of them. My main aim is to make it as easy as possible to understand the design of a simple microprocessor and subsequent implementation and testing.

 

The box arrived today on time as promised by UPS and the unboxing video is shown below.

 

 

 

I then had to find the correct place on the Xilinx web site to download the (free) Vivado webpack software. I have never found Xilinx's web sites to be particularly easy to use and this was no exception. Eventually I think I have found the correct place to download this software, which then required me to create a user account. After several attempts I managed this and now I am waiting for the nearly 5 GBytes of programme to complete downloading (approximately 30 minutes+). I will let you know what happens..