This is the fifth and last post in the series of fundamental concepts of electric circuits and signals with the Tek 1202B-EDU oscilloscope.  In my previous four posts, I covered circuit analysis (part 1), capacitors (part 2), inductors (part 3), and operational amplifiers (part 4).   In this post, I will look at similarities and differences between analog versus digital signals.  I will be using the new Tek 1202B-EDU Oscilloscope from Tektronix to illustrate these concepts.

 

Let’s start with the questions: Why some electric signals are considered analog and others are considered digital?  Can a signal be both analog and digital the same time?  To answer these questions let’s first notice that we are the ones who make an analog signal digital. Take for example a sinusoidal signal as I am showing in the following picture.

 

blog5_sinusoidal.JPG

 

Most of the people looking at this signal will say that it is an analog signal.   Why?  Everyone may have a different explanation or definition of analog signals, but the decision in most cases will be that this is an analog signal.

 

Let’s look now at a square wave signal, like the one shown in the figure below:

 

blog5_squarewave.JPG

 

In my opinion this signal can be viewed in some cases as analog signal and in other cases as digital signal.  So what makes this signal to be a digital signal?

 

To answer this question let’s think that over the past decades digital signal processing took over a lot of functions that previously were processed by analog circuits. The accuracy has increased significantly from the early times of digital signal processing, and these days most of the signal processing in TVs, CD and DVD players and other multimedia appliances is done digitally. I am not planning to dig into the theory of signal sampling and digital signal processing algorithms, but I only want to mention that all mathematical computations in microprocessors and computers' CPUs are done in the binary system. The reason is that the hardware circuits that perform these mathematical computations work based on two logic states, true and false, so the electric signals used in these circuits need to be able to “encode” the true and false logic states.  An example of electric signal that can do this consists of a square-wave signal.  For this signal we make a rule that says that when this square wave signal is at the upper voltage limit the signal represents a logic high state, and when the signal is at the lower voltage limit it represents a logic low value. More, we assume that the rising and falling edges are sharp enough so that at any moment in time the signal has either a logic high or a logic low value.

 

Remember, this is only a convention, technically we can define logic states for any signal. In fact there are examples of digital signals with multiple logic levels, but I will not go into these details here.

 

In this blog post I will use only digital signals in the form of square waves with only two logic levels: logic high corresponding to the upper voltage level (5V) and logic low corresponding to the lower voltage level (0V).  For measurements I will use TTL type logic gates, so the output level will be actually lower than 5V (it will have lower values that correspond to the limits published in datasheets).

 

So let’s take a look at the inputs and outputs of an AND gate.  AND gates provide a logic true (logic high) at the output only when both inputs are at logic true (high). If any input is at logic false (low) the output will be also at logic false (low).  In the example below I am using the Tektronix 1202B-EDU oscilloscope to probe input A of an AND gate with channel 1 (yellow trace) and the output with channel 2 (blue trace).  Input B is connected to ground, which means it at logic false (low).  In this case the output is at logic false (low), as shown by the blue trace on the oscilloscope.

 

blog5_AND_out_low.JPG

 

Next I connected input B to logic true (high).  Based on the AND gate functionality described above, in this configuration the output follows the toggling signal on input A, as shown in the picture below.

 

blog5_AND_out_toggle.JPG

 

It looks like these waveforms are “perfect” square waves that take only two voltage values, corresponding to logic false and logic true.  The transition between these two voltage levels happens very fast (looks like almost instantaneously).  But is this really what happens?  Let’s use the Tektronix 1202B-EDU oscilloscope to see in more details the transition from logic false (low level) to logic high (high level).  So I have adjusted the time base of the oscilloscope to magnify the transition moment, as I am showing in the picture below:

 

blog5_waveform_details.JPG

 

Notice that especially the input waveform (yellow trace) does not look at all as an ideal square wave transition.  To understand this waveform distorsion let’s look at the structure of a digital data transmission path, as shown in the figure below:

 

blog5_transmission_path_diagram.JPG

 

The signal is generated by a driver circuit, then it travels through a propagation path and after that it arrives at a receiver circuit.  The yellow waveform in the previous picture represented the signal received by the AND gate.  The propagation path is not just a simple wire, in most applications it looks like the diagram below:

 

blog5_transmission_path_physical_structure.JPG

 

I will not go in more details about the transmission line theory here, but I only want to highlight that various structural elements on the overall data transmission path degrade the transmitted waveform.  This degradation is captured in the drawing below:

 

blog5_waveform_drawing.JPG

 

Going back to the AND input waveform measured which the oscilloscope in the previous picture, notice that is looks similar to this drawing. The Tektronix TBS1202B-EDU oscilloscope has built-in measurement functions for overshoot, undershoot, rise time, and many other characteristics of a waveform.  If you look at the bottom of the display, I have highlighted with pink color some of these measurements performed on the input waveform to the AND gate (the yellow trace).

 

One built-in measurement that I find very useful to troubleshooting digital interfaces (USB, SPI, I2C…) is the propagation delay (rise-rise, rise-fall, fall-rise, fall-fall).  In the example below I am measuring the propagation delay through this AND gate, as shown in the picture below:

 

blog5_AND_tpd_A.JPG

 

Notice the propagation delay from the rising edge of the input (yellow trace) to the rising edge of the output (blue trace) displayed at the bottom right corner of the oscilloscope screen.  So it takes 7.2ns for the signal to pass from input A to the output.  Let’s now measure the propagation from input B to the output:

 

blog5_AND_tpd_B.JPG

 

Notice that the propagation delay from input B to the output is 7.6ns, which is longer than the propagation delay from input A.  This is an expected result that can be explained by the architecture of logic gates, which is a more involved topic that I am not planning to cover here.  The point that I want to make is that typical logic gates are not symmetrical and present different characteristics for different inputs.

 

Let’s look next at the output loading of the AND gate.  This is described by the term “fanout”.  A fanout of 1 means that the gate drives only one input of another gate.   A fanout of 2 means that the gate drives two inputs.  In the experiment below I am showing the output waveform of the AND gate when driving a fanout of 1:

 

blog5_AND_out_fanout1.JPG

 

The yellow trace represents the input into the AND gate and the blue trace represents the output of the AND gate that is connected to one input of another AND gate.  Notice the rising edge waveform of the blue trace and the rise time measured at the bottom right corner of the display, 11.40ns.  Let’s see now what happens when I increase the fanout from 1 to 4, as shown in the picture below:

 

blog5_AND_out_fanout4.JPG

 

Notice the changes to the rising edge waveform of the blue trace; there is a non-monotonic region right at the middle of the edge.  The rise time measurement show a degradation to 14.20ns.  Let’s see next what happens when I increase the fanout to 6:

 

blog5_AND_out_fanout6.JPG

 

The rising edge waveform has degraded even more with the non-monotonic region expanded in time and voltage.  The measured rise time is now 16.60ns.

 

So what can we conclude from these measurements?   I would say that the difference between digital and analog signal is only the perception of who looks at them.   In a simplistic view digital signals may look “ideal” but a more detailed analysis reveals that the transition edges need to be analyzed from an analog point of view.  And as transmission data speed increases, the pulse duration decreases and what we are left with are pulse shapes dominated by the transition edges.  And this is what we see in the current standards (USB3, DDR3, DDR4…) and what affects the data communication links in our projects.  Signal integrity (and power integrity too in some applications) addresses these waveform fidelity issues, and a lot of effort has been made in recent years to develop techniques that preserve the signal integrity in data communication channels.

 

This concludes my post about analog versus digital signals, and this blog post is the last one in my series on fundamental concepts of electric signals and circuits.  I enjoyed writing this material and I hope that some of you will find this information beneficial to the projects that you work on.

 

Best Wishes,

Cosmin