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Ok, so for anybody interested or who faces a similar issue in future, I managed to solve my problem.
It turned out to be the choice of PLL within the block as I was trying to share the single incoming external diff clock with all the transceivers in the quad. In my original version I had the CPLL (Channel PLL) chosen for the transceiver reference clock source. When I created the duplicate without shared logic this selection got transferred over to these too. Except there is no valid clock source for the CPLL for these blocks in my design and I need to be using the QPLL (Quad PLL) which can be shared amongst all for transceivers in the quad. I swapped this over in the IP wizard for both transceiver types and tweaked the instantiations accordingly and it all sprang into life.