1 Reply Latest reply on Jun 8, 2020 1:45 PM by narrucmot

    2019.2 BSP Contains Locked IP for PWM_w_Int

    g2cacheq

      I'm trying to use the 2019.2 Ultra96v2 BSP design as a base to modify and generate a known working petalinux build.  When I extract the vivado project from the 2019.2 BSP that I downloaded from Avnet, I get 2 PWM IPs that are locked because they are missing from the IP repository.  If any IP in the block diagram is locked, I cannot modify the bd and generate it.  Where can these packaged IPs be downloaded from?  I found an Avnet git repo here:

       

      https://github.com/Avnet/hdl/tree/master/IP/PWM_w_Int

       

      But this appears to be more than 2 years old and it's unclear it is properly packaged and working for Vivado 2019.2 and this version of the Ultra96v2 BSP.  See attached for a screen capture of Vivado IPI showing the locked status of the PWM ip.